David Van Campenhout

According to our database1, David Van Campenhout authored at least 10 papers between 1993 and 2003.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2003
The Definition of a Temporal Clock Operator.
Proceedings of the Automata, Languages and Programming, 30th International Colloquium, 2003

Reasoning with Temporal Logic on Truncated Paths.
Proceedings of the Computer Aided Verification, 15th International Conference, 2003

2000
Collection and Analysis of Microprocessor Design Errors.
IEEE Des. Test Comput., 2000

1999
Functional design verification for microprocessors by error modeling.
PhD thesis, 1999

Timing verification of sequential dynamic circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

High-Level Test Generation for Design Verification of Pipelined Microprocessors.
Proceedings of the 36th Conference on Design Automation, 1999

1998
Specification and verification of pipelining in the ARM2 RISC microprocessor.
ACM Trans. Design Autom. Electr. Syst., 1998

High-level design verification of microprocessors via error modeling.
ACM Trans. Design Autom. Electr. Syst., 1998

1996
Timing verification of sequential domino circuits.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1993
Interactive Outlining: An Improved Approach Using Active Contours.
Proceedings of the Storage and Retrieval for Image and Video Databases, 1993


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