According to our database1, Der-Yu Tsai authored at least 3 papers between 2019 and 2021.
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ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021
Fault-Tolerance Mechanism Analysis on NVDLA-Based Design Using Open Neural Network Compiler and Quantization Calibrator.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020
ONNC: A Compilation Framework Connecting ONNX to Proprietary Deep Learning Accelerators.
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019