Ning-Chi Huang

According to our database1, Ning-Chi Huang authored at least 7 papers between 2017 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2022
Timing Variability-Aware Analysis and Optimization for Variable-Latency Designs.
IEEE Trans. Very Large Scale Integr. Syst., 2022

2021
An Energy-Efficient Approximate Systolic Array Based on Timing Error Prediction and Prevention.
Proceedings of the 39th IEEE VLSI Test Symposium, 2021

ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021

2020
Fault-Tolerance Mechanism Analysis on NVDLA-Based Design Using Open Neural Network Compiler and Quantization Calibrator.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

2019
Exploration and Exploitation of Dual Timing Margins for Improving Power Efficiency of Variable-Latency Designs.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Sensor-Based Approximate Adder Design for Accelerating Error-Tolerant and Deep-Learning Applications.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2017
Analysis and optimization of variable-latency designs in the presence of timing variability.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017


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