Dheepakkumaran Jayaraman

According to our database, Dheepakkumaran Jayaraman authored at least 6 papers between 2008 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

A method to determine the sensitization probability of a non-robustly testable path.

Dheepakkumaran Jayaraman, Spyros Tragoudas

Proceedings of the International Symposium on Quality Electronic Design, 2013

Performance validation through implicit removal of infeasible paths of the behavioral description.

Dheepakkumaran Jayaraman, Spyros Tragoudas

Proceedings of the International Symposium on Quality Electronic Design, 2013

2011

Occurrence probability analysis of a path at the architectural level.

Dheepakkumaran Jayaraman, Spyros Tragoudas

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2010

Scan Shift Power Reduction by Gating Internal Nodes.

Dheepakkumaran Jayaraman, Rajamani Sethuram, Spyros Tragoudas

J. Low Power Electron., 2010

Gating internal nodes to reduce power during scan shift.

Dheepakkumaran Jayaraman, Rajamani Sethuram, Spyros Tragoudas

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

2008

Implicit Identification of Non-Robustly Unsensitizable Paths using Bounded Delay Model.

Dheepakkumaran Jayaraman, Edward Flanigan, Spyros Tragoudas

Proceedings of the 2008 IEEE International Test Conference, 2008