Dinos Moundanos

According to our database1, Dinos Moundanos authored at least 10 papers between 1994 and 2000.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2000
Analysis of composition complexity and how to obtain smaller canonical graphs.
Proceedings of the 37th Conference on Design Automation, 2000

1999
On Design Validation Using Verification Technology.
J. Electron. Test., 1999

Formal Checking of Properties in Complex Systems Using Abstractions.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

1998
Abstraction Techniques for Validation Coverage Analysis and Test Generation.
IEEE Trans. Computers, 1998

Using Verification Technology for Validation Coverage Analysis and Test Generation.
Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

1996
A Unified Framework for Design Validation and Manufacturing Test.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Distributed Binary Decision Diagrams for Verification of Large Circuit.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

1995
Efficient variable ordering and partial representation algorithm.
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors.
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1994
A new scheme to compute variable orders for binary decision diagrams.
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994


  Loading...