Edmund Ming-Kit Lai

According to our database1, Edmund Ming-Kit Lai authored at least 55 papers between 1997 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2016
A Low Complexity Spectrum Sensing Scheme for Estimating Frequency Band Edges in Multi-Standard Military Communication Receivers.
CoRR, 2016

Design of Variable Bandpass Filters Using First Order Allpass Transformation And Coefficient Decimation.
CoRR, 2016

2014
Low-Complexity Reconfigurable Fast Filter Bank for Multi-Standard Wireless Receivers.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Linear-Phase VDF Design With Unabridged Bandwidth Control Over the Nyquist Band.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

2013
Efficient Implementation of Reconfigurable Warped Digital Filters With Variable Low-Pass, High-Pass, Bandpass, and Bandstop Responses.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2012
A Low Complexity Reconfigurable Non-uniform Filter Bank for Channelization in Multi-standard Wireless Communication Receivers.
J. Signal Process. Syst., 2012

An area and power efficient two-stage parallel spectrum sensing scheme for cognitive radios.
Proceedings of the International Symposium on Communications and Information Technologies, 2012

Design of variable linear phase FIR filters based on second order frequency transformations and coefficient decimation.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Special Issue on Signal Processing for Software Defined Radio Handsets.
J. Signal Process. Syst., 2011

Filter Bank Channelizers for Multi-Standard Software Defined Radio Receivers.
J. Signal Process. Syst., 2011

Guest Editorial: Special Issue on Embedded Signal Processing Circuits and Systems for Cognitive Radio-Based Wireless Communication Devices.
Circuits Syst. Signal Process., 2011

A new variable digital filter design based on fractional delay.
Proceedings of the IEEE International Conference on Acoustics, 2011

2010
PSECMAC intelligent insulin schedule for diabetic blood glucose management under nonmeal announcement.
IEEE Trans. Neural Networks, 2010

An improved common subexpression elimination method for reducing logic operators in FIR filter implementations without increasing logic depth.
Integr., 2010

A reconfigurable filter bank for uniform and non-uniform channelization in multi-standard wireless communication receivers.
Proceedings of the 17th International Conference on Telecommunications, 2010

2009
A Tree-structured Non-uniform Filter Bank for Multi-standard Wireless Receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
A Rough Programming Approach to Power-Balanced Instruction Scheduling for VLIW Digital Signal Processors.
IEEE Trans. Signal Process., 2008

PSECMAC: A Novel Self-Organizing Multiresolution Associative Memory Architecture.
IEEE Trans. Neural Networks, 2008

A cerebellar associative memory approach to option pricing and arbitrage trading.
Neurocomputing, 2008

Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Communication Receivers.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

2007
Hierarchically Clustered Adaptive Quantization CMAC and Its Learning Convergence.
IEEE Trans. Neural Networks, 2007

VLIW instruction scheduling for minimal power variation.
ACM Trans. Archit. Code Optim., 2007

An effective architecture for learning and evolving flexible job-shop schedules.
Eur. J. Oper. Res., 2007

A Greedy Common Subexpression Elimination Algorithm for Implementing FIR Filters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Sampling at Minimum Sampling Rate for Signals in Shift Invariant Spaces.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Digital Modulation Classification using Fuzzy Neural Networks.
Proceedings of the Chance Discoveries in Real World Decision Making: Data-based Interaction of Human Intelligence and Artificial Intelligence, 2006

Low power and high-speed implementation of fir filters for software defined radio receivers.
IEEE Trans. Wirel. Commun., 2006

Improved memoryless RNS forward converter based on the periodicity of residues.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Implementation of Low Power and High-Speed Higher Order Channel Filters for Software Radio Receivers.
Proceedings of the IEEE 17th International Symposium on Personal, 2006

A Brain-Inspired Cerebellar Associative Memory Approach to Option Pricing and Arbitrage Trading.
Proceedings of the Neural Information Processing, 13th International Conference, 2006

A Neuropsychologically-Inspired Computational Approach to the Generalization of Cerebellar Learning.
Proceedings of the Neural Information Processing, 13th International Conference, 2006

Non-Bandlimited Resampling of Images.
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006

2005
An efficient coefficient-partitioning algorithm for realizing low-complexity digital filters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

On the implementation of efficient channel filters for wideband receivers by optimizing common subexpression elimination methods.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

VLIW instruction scheduling for DSP processors based on rough set theory.
Proceedings of the Eighth International Symposium on Signal Processing and Its Applications, 2005

Complexity reduction of software defined radio channelizers using filter coefficient-partitioning.
Proceedings of the Eighth International Symposium on Signal Processing and Its Applications, 2005

Optimizing vertical common subexpression elimination using coefficient partitioning for designing low complexity software radio channelizers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Comparison of the horizontal and the vertical common subexpression elimination methods for realizing digital filters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Design of low complexity high-speed pulse-shaping IIR filters for mobile communication receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A rough programming approach to power-aware VLIW instruction scheduling for digital signal processors.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

Hierarchical Clustering for Efficient Memory Allocation in CMAC Neural Network.
Proceedings of the Artificial Neural Networks: Formal Models and Their Applications, 2005

Instruction scheduling of VLIW architectures for balanced power consumption.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Automatic Timetabling Using Artificial Immune System.
Proceedings of the Algorithmic Applications in Management, First International Conference, 2005

Rule-Based Power-Balanced VLIW Instruction Scheduling with Uncertainty.
Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2004
Design and implementation of an RNS-based 2-D DWT processor.
IEEE Trans. Consumer Electron., 2004

Shared-Storage Auction Ensures Data Availability.
IEEE Internet Comput., 2004

Moduli Set Selection and Cost Estimation for RNS-Based FIR Filter and Filter Bank Design.
Des. Autom. Embed. Syst., 2004

Optimization method for designing filter bank channelizer of a software defined radio using vertical common subexpression elimination.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Low-complexity filter bank channelizer for wideband receivers using minimum adder multiplier blocks.
Proceedings of IEEE International Conference on Communications, 2004

Model-based approach to separating instrumental music from single track recordings.
Proceedings of the 8th International Conference on Control, 2004

A Low-Power Pipelined Implementation of 2D Discrete Wavelet Transform.
Proceedings of the International Conference on Embedded Systems and Applications, 2004

2003
A reconfigurable multi-standard channelizer using QMF trees for software radio receivers.
Proceedings of the IEEE 14th International Symposium on Personal, 2003

Hardware efficient FIR filter implementation using subfilters for digital receivers.
Proceedings of the Seventh International Symposium on Signal Processing and Its Applications, 2003

An optimal entropy coding scheme for efficient implementation of pulse shaping FIR filters in digital receivers.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

1997
Intelligent Critic System for Architectural Design.
IEEE Trans. Knowl. Data Eng., 1997


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