Douglas L. Maskell
Orcid: 0000-0002-6588-4762Affiliations:
- Nanyang Technological University, Singapore
According to our database1,
Douglas L. Maskell
authored at least 120 papers
between 1999 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
-
on ntu.edu.sg
On csauthors.net:
Bibliography
2023
A Scalable Systolic Accelerator for Estimation of the Spectral Correlation Density Function and Its FPGA Implementation.
ACM Trans. Reconfigurable Technol. Syst., March, 2023
2022
IEEE Trans. Parallel Distributed Syst., 2022
Approximator: A Software Tool for Automatic Generation of Approximate Arithmetic Circuits.
Comput., 2022
2021
An Approximate Adder With a Near-Normal Error Distribution: Design, Error Analysis and Practical Application.
IEEE Access, 2021
Proceedings of the IEEE Region 10 Conference, 2021
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021
2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 40th IEEE International Conference on Distributed Computing Systems, 2020
2019
ACM Trans. Design Autom. Electr. Syst., 2019
CoRR, 2019
Generalized Majority Voter Design Method for N-Modular Redundant Systems Used in Mission- and Safety-Critical Applications.
Comput., 2019
Proceedings of the 3rd European Conference on Electrical Engineering and Computer Science, 2019
2018
IEEE Access, 2018
A System Health Indicator for the Distributed Minority and Majority Voting Based Redundancy Scheme.
Proceedings of the TENCON 2018, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Asynchronous Early Output Block Carry Lookahead Adder with Improved Quality of Results.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Proceedings of the 2nd European Conference on Electrical Engineering and Computer Science, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
CoRR, 2017
Asynchronous Early Output Section-Carry Based Carry Lookahead Adder with Alias Carry Logic.
CoRR, 2017
CoRR, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
A novel two-stage modular multiplier based on racetrack memory for asymmetric cryptography.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
2016
An Area-Efficient FPGA Overlay using DSP Block based Time-multiplexed Functional Units.
CoRR, 2016
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Are Coarse-Grained Overlays Ready for General Purpose Application Acceleration on FPGAs?
Proceedings of the 2016 IEEE 14th Intl Conf on Dependable, 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
An Improved Robust Field-Weakeaning Algorithm for Direct-Torque-Controlled Synchronous-Reluctance-Motor Drives.
IEEE Trans. Ind. Electron., 2015
SIGARCH Comput. Archit. News, 2015
Microelectron. Reliab., 2015
FIE-FCMAC: A novel fuzzy cerebellum model articulation controller (FCMAC) using fuzzy interpolation and extrapolation technique.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015
Automatic fault detection and diagnosis for photovoltaic systems using combined artificial neural network and analytical based methods.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015
2014
Virtualized Execution and Management of Hardware Tasks on a Hybrid ARM-FPGA Platform.
J. Signal Process. Syst., 2014
ACM Trans. Reconfigurable Technol. Syst., 2014
HFL micro inverter with front-end diode clamped multi-level inverter and half-wave cycloconverter.
Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014
Proceedings of the IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, Dallas, TX, USA, October 29, 2014
A uniform implementation scheme for evolutionary optimization algorithms and the experimental implementation of an ACO based MPPT for PV systems under partial shading.
Proceedings of the 2014 IEEE Symposium on Computational Intelligence Applications in Smart Grid, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
J. Parallel Distributed Comput., 2013
Fuzzy interpolation and extrapolation using shift ratio and overall weight measurement based on areas of fuzzy sets.
Proceedings of the 13th UK Workshop on Computational Intelligence, 2013
High-frequency-link micro-inverter with front-end current-fed half-bridge boost converter and half-wave cycloconverter.
Proceedings of the IECON 2013, 2013
A simple and efficient hybrid maximum power point tracking method for PV systems under partially shaded condition.
Proceedings of the IECON 2013, 2013
Current-controlled resonant circuit based photovoltaic micro-inverter with half- wave cycloconverter.
Proceedings of the 2013 IEEE Industry Applications Society Annual Meeting, 2013
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
2012
A Fast High-Level Event-Driven Thermal Estimator for Dynamic Thermal Aware Scheduling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Proceedings of the International Conference on Computational Science, 2012
CUSHAW: a CUDA compatible short read aligner to large genomes based on the Burrows-Wheeler transform.
Bioinform., 2012
Chebyshev Functional Link Neural Network-based modeling and experimental verification for photovoltaic arrays.
Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012
A flann-based controller for maximum power point tracking in PV systems under rapidly changing conditions.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012
2011
Proceedings of the International Conference on Computational Science, 2011
A Novel Fuzzy Associative Memory Architecture for Stock Market Prediction and Trading.
Int. J. Fuzzy Syst. Appl., 2011
BMC Bioinform., 2011
DecGPU: distributed error correction on massively parallel graphics processing units using CUDA and MPI.
BMC Bioinform., 2011
CompleteMOTIFs: DNA motif discovery platform for transcription factor binding experiments.
Bioinform., 2011
Estimation of external quantum efficiency for multi-junction solar cells under influence of charged particles using artificial neural networks.
Proceedings of the IEEE International Conference on Systems, 2011
Performance-Power Design Space Exploration in a Hybrid Computing Platform Suitable for Mobile Applications.
Proceedings of the International Symposium on Electronic System Design, 2011
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
2010
IEEE Trans. Syst. Man Cybern. Part A, 2010
Proceedings of the International Conference on Computational Science, 2010
CUDA-MEME: Accelerating motif discovery in biological sequences using CUDA-enabled graphics processing units.
Pattern Recognit. Lett., 2010
An improved common subexpression elimination method for reducing logic operators in FIR filter implementations without increasing logic depth.
Integr., 2010
MSAProbs: multiple sequence alignment based on pair hidden Markov models and partition function posterior probabilities.
Bioinform., 2010
A dependency graph based methodology for parallelizing HLL applications on FPGA (abstract only).
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010
High level event driven thermal estimation for thermal aware task allocation and scheduling.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
High Speed Biological Sequence Analysis With Hidden Markov Models on Reconfigurable Platforms.
IEEE Trans. Inf. Technol. Biomed., 2009
Parallel reconstruction of neighbor-joining trees for large multiple sequence alignments using CUDA.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Proceedings of the Computational Science, 2009
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009
Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009
Proceedings of the Architecture of Computing Systems, 2009
2008
J. Syst. Archit., 2008
Proceedings of the International Workshop on Multimedia Signal Processing, 2008
Proceedings of 8th IEEE International Conference on Computer and Information Technology, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Supporting multiple-input, multiple-output custom functions in configurable processors.
J. Syst. Archit., 2007
Prerouted FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System.
EURASIP J. Embed. Syst., 2007
Proceedings of the Pattern Recognition in Bioinformatics, 2007
Proceedings of the 13th International Conference on Parallel and Distributed Systems, 2007
Proceedings of the IEEE Congress on Evolutionary Computation, 2007
2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Int. J. Bioinform. Res. Appl., 2006
The design of multiplierless FIR filters with a minimum adder step and reduced hardware complexity.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Accelerating the Viterbi Algorithm for Profile Hidden Markov Models Using Reconfigurable Hardware.
Proceedings of the Computational Science, 2006
Software-Oriented Approach to Hardware-Software Co-Simulation for FPGA-Based Risc Extensible Processor.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Pre-Routed FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System.
Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006
Proceedings of the IEEE International Conference on Evolutionary Computation, 2006
Proceedings of the IEEE International Conference on Evolutionary Computation, 2006
M<sup>2</sup>E: A Multiple-Input, Multiple-Output Function Extension for RISC-Based Extensible Processors.
Proceedings of the Architecture of Computing Systems, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Automatic Identification of Custom Functions for Embedded Processors with MIMO Extensions.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
IEEE Trans. Circuits Syst. II Express Briefs, 2005
IEEE Trans. Circuits Syst. II Express Briefs, 2005
Using reconfigurable hardware to accelerate multiple sequence alignment with ClustalW.
Bioinform., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 11th International Conference on Parallel and Distributed Systems, 2005
An FPGA Model for Developing Dynamic Circuit Computing.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005
Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005
Software-Oriented System-Level Simulation for Design Space Exploration of Reconfigurable Architectures.
Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005
2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Towards Run-Time Re-Configurable Techniques for Real-Time Embedded Applications.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003
2002
IEEE Trans. Instrum. Meas., 2002
2000
IEEE Trans. Instrum. Meas., 2000
1999
The estimation of subsample time delay of arrival in the discrete-time measurement of phase delay.
IEEE Trans. Instrum. Meas., 1999