Edward J. F. Paulus

According to our database, Edward J. F. Paulus authored at least 4 papers between 2006 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

An Echo-Cancelling Front-End for 112Gb/s PAM-4 Simultaneous Bidirectional Signaling in 14nm CMOS.

Ramin Farjadrad, Kambiz Kaviani, David Nguyen, Michael Brown, Govert Geelen, Corné Bastiaansen, Narendra Rao, Viswa Popuri, Greg Shen, Hamid Khatibi, Saudas Dey, Anirban Chatterjee, David Shen, Peter Zijlstra, Harrie Gunnink, Kebin Zhang, Venkat Penumuchu, Oliver Weiss, Edward J. F. Paulus, Joost Briaire

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2014

11.7 A 240mW 16b 3.2GS/s DAC in 65nm CMOS with.

Hans Van de Vel, Joost Briaire, Corné Bastiaansen, Pieter C. W. van Beek, Govert Geelen, Harrie Gunnink, Yongjie Jin, Mustafa Kaba, Kerong Luo, Edward J. F. Paulus, Bang Pham, William Relyveld, Peter Zijlstra

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2009

A 1.2-V 250-mW 14-b 100-MS/s Digitally Calibrated Pipeline ADC in 90-nm CMOS.

Hans Van de Vel, Berry A. J. Buter, Hendrik van der Ploeg, Maarten Vertregt, Govert J. G. M. Geelen, Edward J. F. Paulus

IEEE J. Solid State Circuits, 2009

2006

A 90nm CMOS 1.2V 10b power and speed programmable pipelined ADC with 0.5pJ/conversion-step.

Govert Geelen, Edward J. F. Paulus, Dobson Simanjuntak, Hein Pastoor, René Verlinden

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006