Joost Briaire

According to our database1, Joost Briaire authored at least 9 papers between 2007 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
An Echo-Cancelling Front-End for 112Gb/s PAM-4 Simultaneous Bidirectional Signaling in 14nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2016
A Wideband RF Mixing-DAC Achieving IMD < -82 dBc Up to 1.9 GHz.
IEEE J. Solid State Circuits, 2016

2015
9.6 A 5.3GHz 16b 1.75GS/S wideband RF Mixing-DAC achieving IMD<-82dBc up to 1.9GHz.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
11.7 A 240mW 16b 3.2GS/s DAC in 65nm CMOS with.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A novel timing-error based approach for high speed highly linear Mixing-DAC architectures.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
A novel output transformer based highly linear RF-DAC architecture.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012
Systematic analysis of the impact of mixing locality on Mixing-DAC linearity for multicarrier GSM.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
A 14 bit 200 MS/s DAC With SFDR > 78 dBc, IM3 < - 83 dBc and NSD < - 163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping.
IEEE J. Solid State Circuits, 2011

2007
Statistical Analysis of Mapping Technique for Timing Error Correction in Current-Steering DACs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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