Maarten Vertregt

According to our database, Maarten Vertregt authored at least 20 papers between 1994 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Circuit valorization in the IC design ecosystem.

José Pineda de Gyvez, Hamed Fatemi, Maarten Vertregt

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2014

Digital Systems Power Management for High Performance Mixed Signal Platforms.

Ajay Kapoor, Cas Groot, Gerard Villar Pique, Hamed Fatemi, Juan Diego Echeverri, Leo Sevat, Maarten Vertregt, Maurice Meijer, Vibhu Sharma, Yu Pu, José Pineda de Gyvez

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Standard cell library tuning for variability tolerant designs.

Sebastien Fabrie, Juan Diego Echeverri, Maarten Vertregt, José Pineda de Gyvez

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2011

A narrow-to-wideband scrambling technique increasing software radio receiver linearity.

Fabian van Houwelingen, Ed van Tuijl, Bram Nauta, Maarten Vertregt

Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010

A forward body bias generator for digital CMOS circuits with supply voltage scaling.

Maurice Meijer, José Pineda de Gyvez, Ben Kup, Bert van Uden, Peter Bastiaansen, Marco Lammers, Maarten Vertregt

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

High performance mixed signal: Business and technology.

René Penning de Vries, Hans Rijns, Maarten Vertregt

Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009

A 1.2-V 250-mW 14-b 100-MS/s Digitally Calibrated Pipeline ADC in 90-nm CMOS.

Hans Van de Vel, Berry A. J. Buter, Hendrik van der Ploeg, Maarten Vertregt, Govert J. G. M. Geelen, Edward J. F. Paulus

IEEE J. Solid State Circuits, 2009

A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behavior.

Paul Veldhorst, George Goksun, Anne-Johan Annema, Bram Nauta, Berry A. J. Buter, Maarten Vertregt

Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008

A 1.35 GS/s, 10 b, 175 mW Time-Interleaved AD Converter in 0.13 µm CMOS.

Simon M. Louwsma, A. J. M. van Tuijl, Maarten Vertregt, Bram Nauta

IEEE J. Solid State Circuits, 2008

2007

A Time-Interleaved Track & hold in 0.13 μm CMOS sub-sampling a 4 GHz signal with 43 dB SNDR.

Simon M. Louwsma, Ed van Tuijl, Maarten Vertregt, Bram Nauta

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

A 15-bit 30-MS/s 145-mW three-step ADC for imaging applications.

Hendrik van der Ploeg, Maarten Vertregt, Marco Lammers

IEEE J. Solid State Circuits, 2006

2005

Systematic power reduction and performance analysis of mismatch limited ADC designs.

Peter C. S. Scholtens, David Smola, Maarten Vertregt

Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

2004

Assessment of the merits of CMOS technology scaling for analog circuit design.

Maarten Vertregt, Peter C. S. Scholtens

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

A 1.6 GS/s, 16 times interleaved track & hold with 7.6 ENOB in 0.12 μm CMOS [ADC applications].

Simon M. Louwsma, Ed J. M. van Tuijl, Maarten Vertregt, Peter C. S. Scholtens, Bram Nauta

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003

A 1.8V 100mW 12-bits 80Msample/s two-step ADC in 0.18-μm CMOS.

Amir Zjajo, Hendrik van der Ploeg, Maarten Vertregt

Proceedings of the ESSCIRC 2003, 2003

2002

A 6-b 1.6-Gsample/s flash ADC in 0.18-μm CMOS using averaging termination.

Peter C. S. Scholtens, Maarten Vertregt

IEEE J. Solid State Circuits, 2002

2001

A 2.5-V 12-b 54-Msample/s 0.25-μm CMOS ADC in 1-mm² with mixed-signal chopping and calibration.

Hendrik van der Ploeg, Gian Hoogzaad, Henk A. H. Termeer, Maarten Vertregt, Raf L. J. Roovers

IEEE J. Solid State Circuits, 2001

A Mixed-Signal Design Roadmap.

Ralf Brederlow, Werner Weber, Joseph Sauerer, Stéphane Donnay, Piet Wambacq, Maarten Vertregt

IEEE Des. Test Comput., 2001

1996

BiCMOS and CMOS: a long term relation.

Marcel J. M. Pelgrom, Maarten Vertregt

Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1994

A 25-Ms/s 8-bit CMOS A/D converter for embedded application.

Marcel J. M. Pelgrom, A. C. Jeannet v. Rens, Maarten Vertregt, Marcel B. Dijkstra

IEEE J. Solid State Circuits, August, 1994