Edwin Naroska

Proceedings of the IEEE/SICE International Symposium on System Integration, 2017

MoveHN-A database to support the development of motion based biosignal processing systems.

[BibT_eX]

[DOI]

Proceedings of the 25th European Signal Processing Conference, 2017

2016

A novel approach to creating artificial training and test data for an HMM based posture recognition system.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Workshop on Machine Learning for Signal Processing, 2016

A wearable indoor locating system based on visual marker recognition for people with visual impairment.

[BibT_eX]

[DOI]

Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

2010

Unsupervised Recognition of ADLs.

[BibT_eX]

[DOI]

Todor Dimitrov

Josef Pauli

Proceedings of the Artificial Intelligence: Theories, 2010

A hardware-efficient color segmentation algorithm for face detection.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009

"inBath" - assistive Badumgebung.

[BibT_eX]

[DOI]

Proceedings of the Mensch & Computer 2009: Grenzenlos frei!?, 2009

An improved comparison circuit for low power pre-computation-based content-addressable memory designs.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

Structured Learning of Component Dependencies in AmI Systems.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE/WIC/ACM International Conference on Intelligent Agent Technology, 2008

2007

A probabilistic reasoning framework for smart homes.

[BibT_eX]

[DOI]

Todor Dimitrov

Josef Pauli

Proceedings of the 5th International Workshop on Middleware for Pervasive and Ad-hoc Computing (MPAC 2007), held at the ACM/IFIP/USENIX 8th International Middleware Conference, November 26, 2007

2006

Simultaneously optimizing crosstalk and power for instruction bus coupling capacitance using wire pairing.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2006

Optimal partitioned fault-tolerant bus layout for reducing power in nanometer designs.

[BibT_eX]

[DOI]

Chun-Chih Chen

Proceedings of the 2006 International Symposium on Physical Design, 2006

An Operating System Design for the Security Architecture for Microprocessors.

[BibT_eX]

[DOI]

Raúl Durán Díaz

Proceedings of the Information and Communications Security, 8th International Conference, 2006

A New Encryption and Hashing Scheme for the Security Architecture for Microprocessors.

[BibT_eX]

[DOI]

Raúl Durán Díaz

Proceedings of the Communications and Multimedia Security, 2006

A Cache Design for a Security Architecture for Microprocessors (SAM).

[BibT_eX]

[DOI]

Kai Grundmann

Proceedings of the Architecture of Computing Systems, 2006

2005

Bipartitioning and encoding in low-power pipelined circuits.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2005

An efficient algorithm for simultaneous wire permutation, inversion, and spacing.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Simultaneous Wire Permutation, Inversion, and Spacing with Genetic Algorithm for Energy-Efficient Bus Design.

[BibT_eX]

[DOI]

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Verlustleistungsarme Fehlerschutzprotokolle basierend auf punktierten Low Density Parity Check Codes (LDPC).

[BibT_eX]

[DOI]

Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005

A combined hardware and software architecture for secure computing.

[BibT_eX]

[DOI]

Proceedings of the Second Conference on Computing Frontiers, 2005

2004

A Service Gateway for Networked Sensor Systems.

[BibT_eX]

[DOI]

IEEE Pervasive Comput., 2004

Sindrion: a prototype system for low-power wireless control networks.

[BibT_eX]

[DOI]

Proceedings of the 2004 IEEE International Conference on Mobile Ad-hoc and Sensor Systems, 2004

A data puncturing IR-scheme for type-II hybrid ARQ protocols using LDPC codes.

[BibT_eX]

[DOI]

Proceedings of the Global Telecommunications Conference, 2004. GLOBECOM '04, Dallas, Texas, USA, 29 November, 2004

2003

On optimizing power and crosstalk for bus coupling capacitance using genetic algorithms.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A novel approach for digital waveform compression.

[BibT_eX]

[DOI]

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

ENPCO: an entropy-based partition-codec algorithm to reduce power for bipartition-codec architecture in pipelined circuits.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2002

On an on-line scheduling problem for parallel jobs.

[BibT_eX]

[DOI]

Inf. Process. Lett., 2002

Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits.

[BibT_eX]

[DOI]

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Energy analysis of bipartition architecture for pipelined circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001

Efficient parallel timing simulation of synchronous models on networks of workstations.

[BibT_eX]

[DOI]

J. Syst. Archit., 2001

2000

Hybrid Parallel Circuit Simulation Approaches.

[BibT_eX]

[DOI]

Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), 2000

1999

Conservative Parallel Simulation of a Large Number of Processes.

[BibT_eX]

[DOI]

Simul., 1999

1998

Parallel VHDL Simulation.

[BibT_eX]

[DOI]

Proceedings of the 1998 Design, 1998

1997

Parallele VHDL-Simulation.

[BibT_eX]

[DOI]

PhD thesis, 1997

1996

A New Scheduling Method for Parallel Discrete-Event Simulation.

[BibT_eX]

[DOI]