Efstathios Sotiriou-Xanthopoulos

Orcid: 0000-0001-8323-3747

According to our database1, Efstathios Sotiriou-Xanthopoulos authored at least 20 papers between 2011 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
OpenCL-based Virtual Prototyping and Simulation of Many-Accelerator Architectures.
ACM Trans. Embed. Comput. Syst., 2018

2016
Μεθοδολογίες ταχείας εικονικής προτυποποίησης και αυτοματοποιημένης εξερεύνησης χώρου σχεδιασμού για συστήματα πολλαπλών συνεπεξεργαστών υλικού
PhD thesis, 2016

A Framework for Interconnection-Aware Domain-Specific Many-Accelerator Synthesis.
ACM Trans. Embed. Comput. Syst., 2016

An Integrated Exploration and Virtual Platform Framework for Many-Accelerator Heterogeneous Systems.
ACM Trans. Embed. Comput. Syst., 2016

An OpenCL-based framework for rapid virtual prototyping of heterogeneous architectures.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

2015
A virtual platform for exploring hierarchical interconnection for many-accelerator systems.
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

A power estimation technique for cycle-accurate higher-abstraction SystemC-based CPU models.
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

Rapid prototyping and Design Space Exploration methodologies for many-accelerator systems.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014
Plug&Chip: A Framework for Supporting Rapid Prototyping of 3D Hybrid Virtual SoCs.
ACM Trans. Embed. Comput. Syst., 2014

A framework for rapid evaluation of heterogeneous 3-D NoC architectures.
Microprocess. Microsystems, 2014

Co-design of many-accelerator heterogeneous systems exploiting virtual platforms.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Hardware accelerated rician denoise algorithm for high performance magnetic resonance imaging.
Proceedings of the 4th International Conference on Wireless Mobile Communication and Healthcare: "Transforming healthcare through innovations in mobile and wireless technologies", 2014

Effective Platform-Level Exploration for Heterogeneous Multicores Exploiting Simulation-Induced Slacks.
Proceedings of the 5th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 3rd Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2014

2013
A Process-based Reconfigurable SystemC Module for simulation speedup.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

HVSoCs: A Framework for Rapid Prototyping of 3-D Hybrid Virtual System-on-Chips.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

2012
Systematic design and evaluation of a scalable reconfigurable multiplier scheme for HLS environments.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

2011
VITRO: a flexible and innovative architecture for virtual travel agent information systems.
Int. J. Serv. Technol. Manag., 2011

Low-Power Reconfigurable Component Utilization in a High-Level Synthesis Flow.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Design and experimentation with low-power morphable multipliers.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011


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