Dimitris Bekiaris

According to our database1, Dimitris Bekiaris authored at least 12 papers between 2007 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2014
Systematic Design and Evaluation of Reconfigurable Arithmetic Components in the Deep submicron Domain.
J. Circuits Syst. Comput., 2014

2012
Systematic design and evaluation of a scalable reconfigurable multiplier scheme for HLS environments.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

Run-Time Measurement of Harvested Energy for Autarkic Sensor Operation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012

Power Optimization Opportunities for a Reconfigurable Arithmetic Component in the Deep Submicron Domain.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011
Low-Power Reconfigurable Component Utilization in a High-Level Synthesis Flow.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

2010
A Temperature-Aware Time-Dependent Dielectric Breakdown Analysis Framework.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010



2009
A design methodology for high-performance and low-leakage fixed-point transpose FIR filters.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
A high-speed radix-4 multiplexer-based array multiplier.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

Efficient serial and parallel implementation of programmable fir filters based on the merging technique.
Proceedings of the 2008 16th European Signal Processing Conference, 2008

2007
Power-Efficient and Low Latency Implementation of Programmable FIR filters Using Carry-Save Arithmetic.
Proceedings of the 14th IEEE International Conference on Electronics, 2007


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