Eliseu M. Chaves Filho

According to our database1, Eliseu M. Chaves Filho authored at least 11 papers between 1992 and 2000.

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Bibliography

2000
Design and Implementation of the MorphoSys Reconfigurable Computing Processor.
J. VLSI Signal Process., 2000

<i>MorphoSys</i>: An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive Applications.
IEEE Trans. Computers, 2000

MorphoSys: case study of a reconfigurable computing system targeting multimedia applications.
Proceedings of the 37th Conference on Design Automation, 2000

The Dynamic Trace Memorization Reuse Technique.
Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), 2000

1999
MorphoSys: A Reconfigurable Processor Trageted to High Performance Image Application.
Proceedings of the Parallel and Distributed Processing, 1999

The MorphoSys Parallel Reconfigurable System.
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999

The MorphoSys Dynamically Reconfigurable System-on-Chip.
Proceedings of the 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), 1999

1997
The Effect of the Speculation Depth on the Performance of Superscalar Architectures.
Proceedings of the Euro-Par '97 Parallel Processing, 1997

1996
Functionality Distribution on a Superscalar Architecture.
Proceedings of the Euro-Par '96 Parallel Processing, 1996

Load Balancing in Superscalar Architectures.
Proceedings of the 22rd EUROMICRO Conference '96, 1996

1992
Time Sharing in Hypercube Multiprocessors.
Proceedings of the Fourth IEEE Symposium on Parallel and Distributed Processing, 1992


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