Eric Felt

According to our database1, Eric Felt authored at least 8 papers between 1992 and 1996.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

1996
Automation of IC layout with analog constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

Optimization of analog IC test structures.
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Hierarchical statistical characterization of mixed-signal circuits using behavioral modeling.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1995
Symbolic compaction with analogue constraints.
Int. J. Circuit Theory Appl., 1995

1994
Testing of analog systems using behavioral models and optimal experimental design techniques.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Measurement and modeling of MOS transistor current mismatch in analog IC's.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993
Dynamic variable reordering for BDD minimization.
Proceedings of the European Design Automation Conference 1993, 1993

1992
An efficient methodology for symbolic compaction of analog IC's with multiple symmetry constraints.
Proceedings of the conference on European design automation, 1992


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