Erwin Janssen
  According to our database1,
  Erwin Janssen
  authored at least 10 papers
  between 2003 and 2017.
  
  
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
  2017
    IEEE Trans. Circuits Syst. II Express Briefs, 2017
    
  
  2015
A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS.
    
  
    IEEE J. Solid State Circuits, 2015
    
  
15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOS.
    
  
    Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
    
  
  2013
    Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
    
  
An 11b 1GS/s ADC with parallel sampling architecture to enhance SNDR for multi-carrier signals.
    
  
    Proceedings of the ESSCIRC 2013, 2013
    
  
  2011
A 480 mW 2.6 GS/s 10b Time-Interleaved ADC With 48.5 dB SNDR up to Nyquist in 65 nm CMOS.
    
  
    IEEE J. Solid State Circuits, 2011
    
  
    Proceedings of the IEEE International Solid-State Circuits Conference, 2011
    
  
  2005
    IEEE Trans. Circuits Syst. I Regul. Pap., 2005
    
  
  2004
    Proceedings of the 2004 IEEE International Conference on Acoustics, 2004
    
  
  2003