Faizal Arya Samman

Orcid: 0000-0002-1985-5805

According to our database1, Faizal Arya Samman authored at least 18 papers between 2002 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

Online presence:

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Bibliography

2014
Runtime connection-oriented guaranteed-bandwidth network-on-chip with extra multicast communication service.
Microprocess. Microsystems, 2014

2013
Runtime Contention and Bandwidth-Aware Adaptive Routing Selection Strategies for Networks-on-Chip.
IEEE Trans. Parallel Distributed Syst., 2013

2012
Erratum to Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method Microprocessors and Microsystems (2012) 449-461.
Microprocess. Microsystems, 2012

Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method.
Microprocess. Microsystems, 2012

2011
New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip.
IEEE Trans. Parallel Distributed Syst., 2011

Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip.
Microprocess. Microsystems, 2011

Design of an autonomous platform for distributed sensing-actuating systems.
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

Reconfigurable streaming processor core with interconnected floating-point arithmetic units for multicore adaptive signal processing systems.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Invited paper: Design criteria for dependable System-on-Chip architectures.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Reconfigurable interconnect infrastructure for multi-FPGA-based adaptive multiprocessing systems.
Proceedings of the 1st International Workshop on Computing in Heterogeneous, 2011

2010
Microarchitecture and Implementation of Networks-on-Chip with a Flexible Concept for Communication Media Sharing
PhD thesis, 2010

Adaptive and Deadlock-Free Tree-Based Multicast Routing for Networks-on-Chip.
IEEE Trans. Very Large Scale Integr. Syst., 2010

2009
Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management.
VLSI Design, 2009

2008
Flexible parallel pipeline network-on-chip based on dynamic packet identity management.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Multicast Parallel Pipeline Router Architecture for Network-on-Chip.
Proceedings of the Design, Automation and Test in Europe, 2008

2002
The reconfigurable membership function circuit using analog bipolar electronics.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

Programmable fuzzy logic controller circuit on CPLD chip.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

Analog MOS circuit design for reconfigurable fuzzy logic controller.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002


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