Manfred Glesner
According to our database1,
Manfred Glesner
authored at least 346 papers
between 1986 and 2017.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2000, "For contributions to the development of microelectronic system design and education in microelectronics.".
Timeline
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Bibliography
2017
Proceedings of the VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things, 2017
2014
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014
2013
Runtime Contention and Bandwidth-Aware Adaptive Routing Selection Strategies for Networks-on-Chip.
IEEE Trans. Parallel Distributed Syst., 2013
Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach.
ACM Trans. Embed. Comput. Syst., 2013
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
An event-based middleware for the remote management of runtime hardware reconfiguration.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Design of an organic electronic label on a flexible substrate for temperature sensing.
Proceedings of the ESSCIRC 2013, 2013
2012
Erratum to Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method Microprocessors and Microsystems (2012) 449-461.
Microprocess. Microsystems, 2012
Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method.
Microprocess. Microsystems, 2012
Int. J. Reconfigurable Comput., 2012
Hardware acceleration of combined cipher and forward error correction for low-power wireless applications.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012
Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs.
Proceedings of the 2012 International Symposium on System on Chip, 2012
(GECO)<sup>2</sup>: A graphical tool for the generation of configuration bitstreams for a smart sensor interface based on a Coarse-Grained Dynamically Reconfigurable Architecture.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
2011
New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip.
IEEE Trans. Parallel Distributed Syst., 2011
Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip.
Microprocess. Microsystems, 2011
Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework.
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011
Reconfigurable streaming processor core with interconnected floating-point arithmetic units for multicore adaptive signal processing systems.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
RF energy harvester design with autonomously adaptive impedance matching network based on auxiliary charge-pump rectifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
A Multi-level Reconfigurable Architecture for a Wireless Sensor Node Coprocessing Unit.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
Pipelined Floating-Point Architecture for a Phase and Magnitude Detector Based on CORDIC.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Mechanisms and Architecture for the Dynamic Reconfiguration of an Advanced Wireless Sensor Node.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Reconfigurable interconnect infrastructure for multi-FPGA-based adaptive multiprocessing systems.
Proceedings of the 1st International Workshop on Computing in Heterogeneous, 2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms.
Int. J. Embed. Real Time Commun. Syst., 2010
Instruction Set Simulator for MPSoCs based on NoCs and MIPS Processors.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010
A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
Novel method of chaotic systems evaluation for implementations of encryption algorithms.
Proceedings of the 17th International Conference on Telecommunications, 2010
Improving QoS of Multi-layer Networks-on-Chip with Partial and Dynamic Reconfiguration of Routers.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010
2009
VLSI Design, 2009
On the design of reconfigurable multipliers for integer and Galois field multiplication.
Microprocess. Microsystems, 2009
J. Low Power Electron., 2009
A Decentralised Task Mapping Approach for Homogeneous Multiprocessor Network-On-Chips.
Int. J. Reconfigurable Comput., 2009
Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms.
Int. J. Reconfigurable Comput., 2009
A Multistep Extrapolated S-Parameter Model for Arbitrary On-Chip Interconnect Structures.
Proceedings of the VLSI-SoC: Technologies for Systems Integration, 2009
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
An integrated tool flow to realize runtime-reconfigurable applications on a new class of partial multi-context FPGAs.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Design and evaluation of an energy-efficient dynamically reconfigurable architecture for wireless sensor nodes.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008
A fast and compact classifier based on sorting in an iteratively expanded input space.
Int. J. Intell. Syst., 2008
A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters.
Proceedings of the VLSI-SoC: Design Methodologies for SoC and SiP, 2008
Proceedings of the 4th IEEE International Conference on Signal Image Technology and Internet Based Systems, 2008
Configurable VLSI Architecture of a General Purpose Lifting-based Wavelet Processor.
Proceedings of the SIGMAP 2008, 2008
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008
A simplified executable model to evaluate latency and throughput of networks-on-chip.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008
Bandwidth Requirement Determination for a Digitally Controlled Cavity Synchronisation in a Heavy Ion Synchrotron Using Ptolemy II.
Proceedings of the 19th IEEE/IFIP International Symposium on Rapid System Prototyping: RSP 2009, 2008
A Methodology for Wireless Sensor Network Prototyping with Sophisticated Debugging Support.
Proceedings of the 19th IEEE/IFIP International Symposium on Rapid System Prototyping: RSP 2009, 2008
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Flexible parallel pipeline network-on-chip based on dynamic packet identity management.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008
TinyOS Extensions for a Wireless Sensor Network Node Based on a Dynamically Reconfigurable Processor.
Proceedings of the Distributed Embedded Systems: Design, 2008
High-Speed Configurable VLSI Architecture of a General Purpose Lifting-Based Discrete Wavelet Processor.
Proceedings of the e-Business and Telecommunications - International Conference, 2008
Proceedings of the 28th IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2008 Workshops), 2008
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008
Proceedings of the FPL 2008, 2008
A lifting-based DWT and IDWT processor with multi-context configuration and normalization factor.
Proceedings of the FPL 2008, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches in Transistor Pairs.
Proceedings of the Design, Automation and Test in Europe, 2008
Novel approach on lifting-based DWT and IDWT processor with multi-context configuration to support different wavelet filters.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008
Impact of circuit nonidealities on the implementation of switched-capacitor resonators.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
High-performance floating-point VLSI architecture of lifting-based forward and inverse wavelet transforms.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
Simultaneous On-Chip Bus Synthesis and Voltage Scaling Under Random On-Chip Data Traffic.
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE Trans. Ind. Electron., 2007
Signal Activity Analysis for High-Level Power Estimation in Time-Shared Linear Systems.
J. Low Power Electron., 2007
Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme).
it Inf. Technol., 2007
Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms.
Comput. Electr. Eng., 2007
Specification of alternative execution semantics of UML sequence diagrams within actor-oriented models.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007
A Customizable LEON2-Based VLIW Processor.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007
Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007
On the Design of a Reconfigurable Multiplier for Integer and Galois Field Multiplication.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007
System Level Design of a Dynamically Self-Reconfigurable Image Processing System.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007
On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron Interconnects.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
Ein Beitrag zur automatischen Erzeugung dynamisch rekonfigurierbarer Hardwarestrukturen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the Global Communications Conference, 2007
Proceedings of the Global Communications Conference, 2007
A Domain-Specific Dynamically Reconfigurable Hardware Platform for Wireless Sensor Networks.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007
Proceedings of the FPL 2007, 2007
Interactive presentation: Executable system-level specification models containing UML-based behavioral patterns.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Tabu Search Based On-Chip Communication Bus Synthesis for Shared Multi-Bus Based Architecture.
Proceedings of the IFIP VLSI-SoC 2006, 2006
Energy Conscious Simultaneous Voltage Scaling and On-chip Communication Bus Synthesis.
Proceedings of the IFIP VLSI-SoC 2006, 2006
Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters.
Proceedings of the IFIP VLSI-SoC 2006, 2006
Exploring Functional Unit Parallelism in Reconfigurable Computing Platforms.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006
A Concept for a Profile-based Dynamic Reconfiguration Mechanism.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006
Adaptable Image Processing System based on FPGA Modular Multi Kernel Instantiations.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Eine Scheduling Heuristik zur Minimierung der Verlustleistung.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006
Proceedings of the Dagstuhl-Workshop MBEES: Modellbasierte Entwicklung eingebetteter Systeme II, 2006
An Efficient Hardware Implementation of a Self-Adaptable Equalizer for WCDMA Downlink UMTS Standard.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Energy efficient MPSoC on-chip communication bus synthesis using voltage scaling technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Energy Efficient Statistical On-Chip Communication Bus Synthesis for a Reconfigurable Architecture.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the Forum on specification and Design Languages, 2006
A signal theory based approach to the statistical analysis of combinatorial nanoelectronic circuits.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006
Statistical on-chip communication bus synthesis and voltage scaling under timing yield constraint.
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the ARCS 2006, 2006
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
2005
Microelectron. J., 2005
On The Design of A Dynamically Reconfigurable Function-Unit for Error Detection and Correction.
Proceedings of the VLSI-SoC: From Systems To Silicon, 2005
Performance aware on-chip communication synthesis and optimization for shared multi-bus based architecture.
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005
Non-linear addressing scheme for a lookup-based transformation function in a reconfigurable noise generator.
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques.
Proceedings of the Embedded Computer Systems: Architectures, 2005
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
Analysis and Architectural Study of a Hybrid ASIC/Configurable State Machine Model.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005
Design and Implementation of a Multi-Core Architecture for Overhead Processing in Optical Transport Networks.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005
Experiences on Actor-oriented Design of Reconfigurable Systems.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005
Advanced On-Chip Communication Architectures and Routing Methods for Systems-on-Chip.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005
Proxy-Based Integration of Reconfigurable Hardware Within Simulation Environments: Improving E-Learning Experience in Microelectronics.
Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
Proceedings of the 12th IEEE International Conference on Electronics, 2005
Deadlock-free routing and component placement for irregular mesh-based networks-on-chip.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Abstrakte Modellierung der Eigenschaften von nanoelektronischen CNT-Elementen in SystemC.
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005
A State-Serial Viterbi Decoder Architecture for Digital Radio on FPGA.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005
Optimal FFT Architecture Selection for OFDM Receivers on FPGA.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005
A Hardware-in-the-Loop System to Evaluate the Performance of Small-World Cellular Automata.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
Programmable and Reconfigurable Hardware Architectures for the Rapid Prototyping of Cellular Automata.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005
Prozessorintegration und Speicheranbindung dynamisch rekonfigurierbarer Funktionseinheiten.
Proceedings of the 18th International Conference on Architecture of Computing Systems, 2005
2004
RITA, 2004
Microelectron. Reliab., 2004
Lookup-based Remote Laboratory for FPGA Digital Design Prototyping.
Proceedings of the e-learning and Virtual and Remote Laboratories, 2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004
Proceedings of the Integrated Circuit and System Design, 2004
Proceedings of the Integrated Circuit and System Design, 2004
An Asynchronous Switch Implmentation for Systems-on-a-Chip.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004
Flexible Overhead Processing Architectures for G.709 Optical Transport Networks.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004
A Configurable Pipelined State Machine as a Hybrid ASIC and Configurable Architecture.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Design of a reconfigurable AES encryption/decryption engine for mobile terminals.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Dynamic power optimization of the trace-back process for the Viterbi algorithm.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A Dynamically Reconfigurable Function-Unit for Error Detection and Correction in Mobile Terminals.
Proceedings of the Field Programmable Logic and Application, 2004
Proceedings of the Field Programmable Logic and Application, 2004
Proceedings of the Field Programmable Logic and Application, 2004
On the design of a function-specific reconfigurable: hardware accelerator for the MAC-layer in WLANs.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004
Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing.
Proceedings of the First Conference on Computing Frontiers, 2004
Proceedings of the First Conference on Computing Frontiers, 2004
Proceedings of the ARCS 2004, 2004
2003
Des. Autom. Embed. Syst., 2003
Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped Systems.
Des. Autom. Embed. Syst., 2003
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003
Proceedings of the VLSI-SOC: From Systems to Chips, 2003
An Adaptive Trace-Back Solution for State-Parallel Viterbi Decoders.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs.
Proceedings of the VLSI-SOC: From Systems to Chips, 2003
A hierarchical generic approach for on-chip communication, testing and debugging of SoCs.
Proceedings of the IFIP VLSI-SoC 2003, 2003
A Versatile Cellular Neural Circuit Based on a Multi-nested Approach: Functional Capabilities and Applications.
Proceedings of the IFIP VLSI-SoC 2003, 2003
High Performance of an AES-Rijndael ASIC working in OCB/ECB Modes of Operation.
Proceedings of the IFIP VLSI-SoC 2003, 2003
An Integrated Model Bridging the Gap between Technology and Economy.
Proceedings of the IFIP VLSI-SoC 2003, 2003
The requirement for flexibility in IP-based designs increasesHardware Evaluation of Low Power Communication Mechanisms for Transport-Triggered Architectures.
Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 2003
Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems.
Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 2003
Proceedings of the Integrated Circuit and System Design, 2003
Reducing Authoring Costs of Online Training in Microelectronics Design by Reusing Design Documentation Content.
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003
Compact image compression using simplicial and ART neural systems with mixed signal implementations.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003
Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003
Supporting Consistency Control between Functional and Structural Views in Interface-based Design Models.
Proceedings of the Forum on specification and Design Languages, 2003
Ubiquitous Access to Reconfigurable Hardware: Application Scenarios and Implementation Issues.
Proceedings of the 2003 Design, 2003
2002
The simplicial neural cell and its mixed-signal circuit implementation: an efficient neural-network architecture for intelligent signal processing in portable multimedia applications.
IEEE Trans. Neural Networks, 2002
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002
Power Estimation Based on Transition Activity Analysis with an Architecture Precise Rapid Prototyping System.
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the 2002 Design, 2002
Comparative Analysis and Application of Data Repository Infrastructure for Collaboration-Enabled Distributed Design Environments.
Proceedings of the 2002 Design, 2002
Proceedings of the 39th Design Automation Conference, 2002
2001
A Parallel Dynamically Reconfigurable Architecture Designed for Flexible Application-Tailored Hardware/Software Systems in Future Mobile Communication.
J. Supercomput., 2001
Lower bound on the accuracy of the CORDIC-based frequency offset compensation in burst oriented OFDM systems.
Proceedings of the 54th IEEE Vehicular Technology Conference, 2001
Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001
Prototyping of Efficient Hardware Algorithms for Data Compression in Future Communication Systems.
Proceedings of the 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 2001
Concept of a Joint University/Industry Course for Mixed-Signal System-On-Chip Design.
Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001
Transformierende Synthese zur Verlustleistungsreduktion mittels Partitionierung.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Distributed Collaborative Design over Cave2 Framework.
Proceedings of the SOC Design Methodologies, 2001
On the numerical accuracy of CORDIC-based frequency offset compensation in burst oriented OFDM systems.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the Global Telecommunications Conference, 2001
Efficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures.
Proceedings of the Field-Programmable Logic and Applications, 2001
2000
IEEE Trans. Signal Process., 2000
Flexible architectures for DCT of variable-length targeting shape-adaptive transform.
IEEE Trans. Circuits Syst. Video Technol., 2000
Design methodology of application specific integrated circuits for mechatronic systems.
Microprocess. Microsystems, 2000
Eine flexible Simulationsumgebung für System-On-Chip Design (A Flexible Simulation Environment for System-On-Chip Design).
Informationstechnik Tech. Inform., 2000
Synthese von Kommunikationsstrukturen und architekturgenaues Rapid-Prototyping eingebetteter Echtzeitsysteme (Communication Synthesis and Architecture-Precise Rapid Prototyping of Embedded systems with Hard Real-Time Constraints).
Informationstechnik Tech. Inform., 2000
Communication Performance Models for Architecture-Precise Prototyping of Real-Time Embedded Systems.
Des. Autom. Embed. Syst., 2000
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
An Application-Tailored Dynamically Reconfigurable Hardware Architecture for Digital Baseband Processing.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
Automated Communication Synthesis for Architecture-Precise Rapid Prototyping of Real-Time Embedded Systems.
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000
Hardware Accelerated Estimation of Multiplexer-Introduced Loss for MPEG-4 Data Streams.
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000
Simulation and Rapid Prototyping of Flexible Systems-on-a-Chip for Future Mobile Communication Applications.
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000
Fast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000
IP-based Application Mapping Techniques for Dynamically Reconfigurable Hardware Architectures.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000
Communication Performance Estimation and Communication Synthesis for Architecture-precise Prototyping of Real-time Embedded Systems.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Frankfurt, Germany, February 28, 2000
Estimation of Multiplexer-Introduced Loss for MPEG-4 Data Streams Connected to (R)CBR Channels.
Proceedings of the Fifth IEEE Symposium on Computers and Communications (ISCC 2000), 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Configurable VLSI-architectures for both standard DCT and shape-adaptive DCT in future MPEG-4 circuit implementations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Rotating stall analysis using signal-adapted filter bank and Cohen's time-frequency distributions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
An efficient filter bank architecture for the cross-term reduced processing of discrete time-frequency distributions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Direct Bayes Point Machines.
Proceedings of the Seventeenth International Conference on Machine Learning (ICML 2000), Stanford University, Stanford, CA, USA, June 29, 2000
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
Computing discrete time-frequency distributions using principal component filter bank.
Proceedings of the IEEE International Conference on Acoustics, 2000
Field Programmable Communication Emulation and Optimization for Embedded System Design.
Proceedings of the Field-Programmable Logic and Applications, 2000
DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communications Applications.
Proceedings of the Field-Programmable Logic and Applications, 2000
Architecture and Application of a Dynamically Reconfigurable Hardware Array for Future Mobile Communication Systems.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000
A dynamically reconfigurable system-on-a-chip architecture for future mobile digital signal processing.
Proceedings of the 10th European Signal Processing Conference, 2000
Proceedings of the 2000 IEEE/ACM International Workshop on Behavioral Modeling and Simulation, 2000
1999
ACM Trans. Design Autom. Electr. Syst., 1999
Pattern Recognit., 1999
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999
Object-oriented Specification Approach for Synthesis of Hardware-/Software Systems.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1999
Proceedings of the International Joint Conference Neural Networks, 1999
Proceedings of the International Joint Conference Neural Networks, 1999
On the variance reduction of neural networks-experimental results for an automotive application.
Proceedings of the International Joint Conference Neural Networks, 1999
Perceptrons revisited: the addition of a non-monotone recursion greatly enhances their representation and classification properties.
Proceedings of the International Joint Conference Neural Networks, 1999
ILP-Based Board-Level Routing of Multi-Terminal Nets for Prototyping Reconfigurable Interconnect.
Proceedings of the VLSI: Systems on a Chip, 1999
A flexible subband-based computation scheme for generalized discrete time-frequency distributions.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
A new flexible architecture for variable length DCT targeting shape-adaptive transform.
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999
A data-driven scheme for the approximated computing of alias-free generalized discrete time-frequency distributions.
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999
Dynamically Reconfigurable Reduced Crossbar: A Novel Approach to Large Scale Switching.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999
MPEG-4 PC - Authoring and Playing of MPEG-4 Content for Local and Broadcast Applications.
Proceedings of the Multimedia Applications, Services and Techniques, 1999
Parallel Hardware Compilation in Complex Hardware/Software Systems based on High-Level Code Transformations.
Proceedings of the Architektur von Rechensystemen, Systemarchitektur auf dem Weg ins 3. Jahrtausend: Neue Strukturen, Konzepte, Verfahren und Bewertungsmethoden, 1999
1998
Real Time Syst., 1998
Development and Implementation of a Neural Knock Detector Using Constructive Learning Methods.
Int. J. Uncertain. Fuzziness Knowl. Based Syst., 1998
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998
Pruning and Regularization Techniques for Feed Forward Nets Applied on a Real World Data Base.
Proceedings of the International ICSC / IFAC Symposium on Neural Computation (NC 1998), 1998
Constructive Learning of a Sub-Feature Detector Network by Means of Prediction Risk Estimation.
Proceedings of the International ICSC / IFAC Symposium on Neural Computation (NC 1998), 1998
A Reconfigurable Hardware-Monitor for Communication Analysis in Distributed Real-Time Systems.
Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998
Proceedings of the Interactive Distributed Multimedia Systems and Telecommunication Services, 1998
An FPFA Implementation of a Magnetic Bearing Controller for Mechatronic Applications.
Proceedings of the Field-Programmable Logic and Applications, 1998
Proceedings of the Field-Programmable Logic and Applications, 1998
Sound signature analysis using time-frequency signal processing: Application to active stall avoidance in axial compressors.
Proceedings of the 9th European Signal Processing Conference, 1998
Advanced Hardware and Software Architectures for Computational Intelligence: Application to a Real World Problem.
Proceedings of the 24th EUROMICRO '98 Conference, 1998
Proceedings of the 1998 Design, 1998
HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems.
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998
1997
ACM Trans. Design Autom. Electr. Syst., 1997
Determination of target volumes for three-dimensional radiotherapy of cancer patients with a fuzzy system.
Fuzzy Sets Syst., 1997
Fuzzy Sets Syst., 1997
Hardware in-the-loop simulation-a rapid prototyping approach for designing mechatronics systems.
Proceedings of the Proceedings 8th IEEE International Workshop on Rapid System Prototyping: Shortening the Path from Specification to Prototype, 1997
Proceedings of the Proceedings 8th IEEE International Workshop on Rapid System Prototyping: Shortening the Path from Specification to Prototype, 1997
Proceedings of the Interactive Distributed Multimedia Systems and Telecommunication Services, 1997
Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997
Automatic transfer of parametric FEM models into CAD-layout formats for top-down design of microsystems.
Proceedings of the European Design and Test Conference, 1997
Generation of the HDL-A-model of a micromembrane from its finite-element-description.
Proceedings of the European Design and Test Conference, 1997
Proceedings of the 34st Conference on Design Automation, 1997
1996
IEEE Trans. Fuzzy Syst., 1996
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996
Searching for robust chaos in discrete time neural networks using weight space exploration.
Proceedings of International Conference on Neural Networks (ICNN'96), 1996
Proceedings of the Proceedings 1996 International Conference on Image Processing, 1996
CAPpartx: Computer Aided Prototyping Partitioning for Xilinx FPGAs, a Hierarchical Partitioning Tool for Rapid Prototyping.
Proceedings of the Field-Programmable Logic, 1996
Proceedings of the 1996 European Design and Test Conference, 1996
1995
Int. J. Neural Syst., 1995
An alternative approach for generation of membership functions and fuzzy rules based on radial and cubic basis function networks.
Int. J. Approx. Reason., 1995
Multidimensional defuzzification - fast algorithms for the determination of crisp characteristic subsets.
Proceedings of the 1995 ACM symposium on applied computing, 1995
A sub Bayesian nearest prototype neural network with fuzzy interpretability for diagnosis problems.
Proceedings of the 1995 ACM symposium on applied computing, 1995
Comparison of a heuristic method with a genetic algorithm for generation of compact rule based classifiers.
Proceedings of the 1995 ACM symposium on applied computing, 1995
Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP '95), 1995
Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit.
Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995
Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995
Proceedings of the Proceedings EURO-DAC'95, 1995
1994
DECADE - fast centroid approximation defuzzification for real time fuzzy control applications.
Proceedings of the 1994 ACM Symposium on Applied Computing, 1994
Proceedings of the 1994 ACM Symposium on Applied Computing, 1994
Automatic generation of a fuzzy classification system using fuzzy clustering methods.
Proceedings of the 1994 ACM Symposium on Applied Computing, 1994
MCEMS Toolbox - A Hardware-in-the-Loop Simulation Environment for Mechatronic Systems.
Proceedings of the MASCOTS '94, Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems, January 31, 1994
A Design Methodology for the Conceptual Design of Application Specific Digital Processors in Mechatronic Systems.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994
Rapid-Prototyping von anwendungsspezifischen Fuzzy Controllern mit Field Programmable Gate Arrays.
Proceedings of the Fuzzy Logik, 1994
Proceedings of the Proceedings EURO-DAC'94, 1994
Protocol merging: a VHDL-based method for clock cycle minimizing and protocol preserving scheduling of IO-operations.
Proceedings of the Proceedings EURO-DAC'94, 1994
Systematic Methods for Multivariate Data Visualization and Numerical Assessment of Class Separability and Overlap in Automated Visual Industrial Quality Control.
Proceedings of the British Machine Vision Conference, 1994
1993
Estimating lower hardware bounds in high-level synthesis.
Proceedings of the VLSI 93, 1993
Proceedings of International Conference on Neural Networks (ICNN'88), San Francisco, CA, USA, March 28, 1993
Neural and associative modules in a hybrid dynamic system for visual industrial quality control.
Proceedings of International Conference on Neural Networks (ICNN'88), San Francisco, CA, USA, March 28, 1993
A rule based prototype system for automatic classification in industrial quality control.
Proceedings of International Conference on Neural Networks (ICNN'88), San Francisco, CA, USA, March 28, 1993
Proceedings of the Fuzzy Logic, 1993
Proceedings of the European Design Automation Conference 1993, 1993
Proceedings of the European Design Automation Conference 1993, 1993
Proceedings of the Fifth Euromicro Workshop on Real-Time Systems, 1993
1992
Proceedings of the Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31, 1992
Proceedings of the conference on European design automation, 1992
Proceedings of the conference on European design automation, 1992
Proceedings of the Application Specific Array Processors, 1992
1991
A VLSI System Design for the Control of High Performance Combustion Engines.
Proceedings of the VLSI 91, 1991
Verifikation mikroelektronischer Systeme zur Prozeßsteuerung durch schnelle Prototypenrealisierung.
Proceedings of the 7. Symposium Simulationstechnik: Fortschritte in der Simulationstechnik, 1991
Proceedings of the Second International Workshop on Rapid System Prototyping, 1991
Proceedings of the Fault-Tolerant Computing Systems, Tests, Diagnosis, 1991
Proceedings of the First Great Lakes Symposium on VLSI, 1991
Proceedings of the First Great Lakes Symposium on VLSI, 1991
Proceedings of the First Great Lakes Symposium on VLSI, 1991
Proceedings of the First Great Lakes Symposium on VLSI, 1991
Proceedings of the First Great Lakes Symposium on VLSI, 1991
1990
Neurocomputing, 1990
Proceedings of the Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, 1990
Proceedings of the IJCNN 1990, 1990
1988
Entwurf eines systolischen Arrays in Wafer Scale Technik für die digitale Signalverarbeitung.
Proceedings of the GI, 1988
Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988
1987
Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987
1986
it Inf. Technol., 1986
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986