Klaus Hofmann
According to our database1,
Klaus Hofmann
authored at least 104 papers
between 1992 and 2023.
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Bibliography
2023
An Enhanced 1440 Coupled CMOS Oscillator Network to Solve Combinatorial Optimization Problems.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023
Single Transistor Analog Building Blocks: Exploiting Back-Bias Reconfigurable Devices.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
A Coupled Oscillator Network to Solve Combinatorial Optimization Problems with Over 95% Accuracy.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Flexible Routing to Overcome the Embedding Bottleneck of Oscillator-based Ising Machines.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
How to Inspire Girls for STEM Studies Through a Series of Consecutive Multi-Day Hands-On Labs.
Proceedings of the 2nd IEEE German Education Conference, 2023
From breadboard to complex electronic systems - introducing a heterogenous group of undergrad students to design and analysis of electronic circuits.
Proceedings of the IEEE Frontiers in Education Conference, 2023
Standalone Area Optimized ASIC Tag Powered and Programmable by Light for Identification of Novel Drug Candidates.
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A Versatile & Adjustable 400 Node CMOS Oscillator Based Ising Machine to Investigate and Optimize the Internal Computing Principle.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022
Quick Compact Model Development Through Slow Transient Simulation: An Alternative Approach to Table Models for Emerging Nanodevices.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Proceedings of the 2022 IEEE Sensors, Dallas, TX, USA, October 30 - Nov. 2, 2022, 2022
Analysis and Design of Oscillator Coupling for Solving Combinatorial Optimization Problems.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
2021
From MOSFETs to Ambipolar Transistors: Standard Cell Synthesis for the Planar RFET Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Sensors, 2021
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
Proceedings of the 3rd Conference on Language, Data and Knowledge, 2021
Exploring Causal Relationships Among Emotional and Topical Trajectories in Political Text Data.
Proceedings of the 3rd Conference on Language, Data and Knowledge, 2021
Pulse Oximetry - Teaching basic Electronic Sensor Signal Processing in a Medical Context.
Proceedings of the IEEE Frontiers in Education Conference, 2021
Converting an Undergrad-Lab to an Interactive E-Learning Experience That Enables Student Teamwork.
Proceedings of the IEEE Frontiers in Education Conference, 2021
2020
Fast Digital Clock Calibration of a Differential 6.4 Gb/s/pin Bidirectional Asymmetric Memory Interface.
IEEE Trans. Circuits Syst., 2020
Low-Power All-Digital Multiphase DLL Design Using a Scalable Phase-to-Digital Converter.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
Towards Ambipolar Planar Devices: The DeFET Device in Area Constrained XOR Applications.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
IoT based Wireless Energy Efficient Smart Metering System Using ZigBee in Smart Cities.
Proceedings of the 7th International Conference on Internet of Things: Systems, 2020
Designing Universal Logic Module FPGA Architectures for Use With Ambipolar Transistor Technology.
Proceedings of the International Conference on Field-Programmable Technology, 2020
2019
CoRR, 2019
A Hardware Perspective on the ChaCha Ciphers: Scalable Chacha8/12/20 Implementations Ranging from 476 Slices to Bitrates of 175 Gbit/s.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
A Digitally Controllable Passive Variable Slope Gain Equalizer for Wideband Radio Frequency System-on-Chip Applications.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019
A 2.5 GHz All-Digital Multiphase DLL and Phase Shifter in 65 nm CMOS using a Scalable Phase-to-Digital Converter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
A Wideband Large Dynamic Range Logarithmic RF Power Detector With 50 mV Input Offset Cancellation Range.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
2018
Redundant Double Conversion based Digital Background Calibration of SAR ADC with Convergence Acceleration and Assistance.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018
A Scalable Fully Synthesized Phase-to-Digital Converter for Phase and Duty-Cycle Measurement of High-Speed Clocks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 30th International Conference on Microelectronics, 2018
A Low-Power and Area-Efficient Digitally Controlled Shunt-Capacitor Delay Element for High-Resolution Delay Lines.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018
2017
A wideband RF power detector with -56 dB sensitivity and 64 dB dynamic range in SiGe BiCMOS technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 29th International Conference on Microelectronics, 2017
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
2016
Noise study of open-loop direct current-current transformer using magneto-resistance sensors.
Proceedings of the IEEE Sensors Applications Symposium, 2016
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
A hardware implementation of the TCP protocol applying TCP-BIC and TCP-CUBIC standards.
Proceedings of the 28th International Conference on Microelectronics, 2016
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016
Proceedings of the 25th IEEE Asian Test Symposium, 2016
Proceedings of the Advances in Databases and Information Systems, 2016
2015
Analysis of asymmetric 3D DRAM architecture in combination with L2 cache size reduction.
Proceedings of the 2015 International Conference on High Performance Computing & Simulation, 2015
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015
2014
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014
LatEst: Latency estimation and high speed evaluation for wormhole switched Networks-on-Chip.
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014
Proceedings of the 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, 2014
Robust design methodology for switched capacitor delta sigma modulators based on current conveyors.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Proceedings of the 3rd Mediterranean Conference on Embedded Computing, 2014
Proceedings of the 2014 International Symposium on System-on-Chip, 2014
Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014
Dynamic quadrant partitioning adaptive routing algorithm for irregular reduced vertical link density topology 3-Dimensional Network-on-Chips.
Proceedings of the International Conference on High Performance Computing & Simulation, 2014
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014
Analysis of current conveyor non-idealities for implementation as integrator in delta sigma modulators.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014
2013
Deadlock-free generic routing algorithms for 3-dimensional Networks-on-Chip with reduced vertical link density topologies.
J. Syst. Archit., 2013
Reconfigurable radio frontends for cooperative sensor networks: Tasks and challenges.
Proceedings of the 14th IEEE Workshop on Signal Processing Advances in Wireless Communications, 2013
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Low-power signal integrity trainings for multi-clock source-synchronous memory systems.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013
GSNoC - The comprehensive design platform for 3-dimensional Networks-on-Chip based many core embedded systems.
Proceedings of the International Conference on High Performance Computing & Simulation, 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Low-power design of hybrid digital impedance calibration for process, voltage, temperature compensations.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Proceedings of the IEEE Third International Conference on Consumer Electronics, 2013
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
Adaptive Low-Power Synchronization Technique for Multiple Source-Synchronous Clocks in High-Speed Communication Systems.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013
Fast and optimized task allocation method for low vertical link density 3-dimensional networks-on-chip based many core systems.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Communication-centric high level synthesis metrics for low vertical channel density 3-dimensional Networks-on-Chip.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012
A genetic algorithm based optimization method for low vertical link density 3-dimensional Networks-on-Chip many core systems.
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012
Impact of group delay on tunable impedance matching networks based on Barium-Strontium-Titanate varactors.
Proceedings of the International Symposium on Signals, Systems, and Electronics, 2012
Deadlock-free routing algorithms for 3-dimension Networks-on-Chip with reduced vertical channel density topologies.
Proceedings of the 2012 International Conference on High Performance Computing & Simulation, 2012
Proceedings of the 2012 International Conference on High Performance Computing & Simulation, 2012
GSNOC UI - A comfortable graphical user interface for advanced design and evaluation of 3-dimensional scalable Networks-on-Chip.
Proceedings of the 2012 International Conference on High Performance Computing & Simulation, 2012
A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012
2011
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011
Design of digitally assisted 1.5b/stage pipeline ADCs using fully differential current conveyors.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
A Fast Congestion-Aware Flow Control Mechanism for ID-Based Networks-on-Chip with Best-Effort Communication.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011
1999
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999
1997
Differential model generation for microsystem components using analog hardware description languages.
PhD thesis, 1997
Generation of the HDL-A-model of a micromembrane from its finite-element-description.
Proceedings of the European Design and Test Conference, 1997
Proceedings of the 34st Conference on Design Automation, 1997
1996
Proceedings of the 1996 European Design and Test Conference, 1996
1992
An Improved Parallel Algorithm for the Solution of Molecular Dynamics Problems on MIMD Multiprocessors.
Proceedings of the Parallel Processing: CONPAR 92, 1992