Fanyi Meng
Orcid: 0000-0003-0989-3119Affiliations:
- Tianjin University, Tianjin, China
According to our database1,
Fanyi Meng authored at least 46 papers
between 2011 and 2026.
Collaborative distances:
Collaborative distances:
Timeline
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on orcid.org
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Bibliography
2026
A 2-to-18 GHz Power Amplifier With 31-dB Gain and ±0.5 dB In-Band Ripple Using Segmented Matching in 0.18-μm SiGe BiCMOS.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2026
A D-Band 6-bit Bi-directional Variable Gain Phase Shifter With 1.3°/0.2 dB RMS Phase/Gain Errors in 40 nm Bulk CMOS for 6G Communications.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2026
A Direct RF Baud Clock Recovery Methodology Based on Super-Regenerative Sample-and-Hold for Low-Cost Real-Time Demodulations.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2026
A 2-pJ/b 32-Gb/s D-Band Super-Regenerative Receiver for Energy-Efficient QAM Demodulations.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2026
A Tripolar Spatiotemporal Stimulator With Return-Electrode-Based Charge-Pack Injection Technique for Charge Imbalance Correction.
IEEE J. Solid State Circuits, March, 2026
Design of a Compact Wideband SPDT Switch With High Isolation for Sub-6 GHz Applications.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2026
An ultra-low-voltage startup PWM controller with gate boost and power supply switching techniques.
Microelectron. J., 2026
2025
A Self-Packaged Flyback Converter With an Embedded Magnetic Core Toroidal Transformer in a Multilayer PCB.
IEEE Trans. Ind. Electron., December, 2025
An Improved Prediction Method of MF Skywave Propagation for Medium and Long-Range Broadcasting Services.
IEEE Trans. Broadcast., December, 2025
A 19-to-45 GHz High-Efficiency Frequency Doubler Using Multi-Port Darlington Cell With Fundamental and Second-Harmonic Pole-Stagger in 55-nm CMOS.
IEEE J. Solid State Circuits, October, 2025
A 97 dB-CMRR Gm-Controlled Inverter-Based Amplifier Employing Multi-CMFB Loops for Multi-Channel Bio-Signal Recording.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2025
Design and Analysis of a 22.6-to-73.9 GHz Low-Noise Amplifier for 5G NR FR2 and NR-U Multiband/Multistandard Communications.
IEEE J. Solid State Circuits, September, 2025
A 28.4-to-39.2 GHz Low-Power Injection-Locked Frequency Quadrupler With Reconfigurable Pre-Filter-Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2025
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2025
Super-Regenerative Reception Technique Based on an Improved General Theory in Linear Mode.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2025
Design of Oscillator-Based Reconfigurable Modulator With High-Q FBAR Resonators Supporting Fast OOK/BFSK/ BPSK Modulation.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2025
A Low-Power Blocker-Tolerant Wideband Receiver With Bias-Tunable Mixer and Effective Switch Resistance Compensation.
IEEE J. Solid State Circuits, May, 2025
A Novel Low-Loss CMOS Digital Step Attenuator for Low-Power Scalable Phased Array Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2025
A multi-module parallel current-sharing circuit and control strategy for brick power supplies.
Microelectron. J., 2025
A 4.5-37 GHz ultra-wideband amplifier with asymmetric T-coil matching network in 0.18-μm SiGe BiCMOS technology.
Microelectron. J., 2025
Two 7-13-GHz GaAs-SiGe Four-Channel Beamforming Chiplets With/Without Metallic Interlayer Shields.
IEEE Solid State Circuits Lett., 2025
A 132-to-148GHz CMOS 4TX-4RX FMCW Radar Transceiver Array with Cavity-Backed Antenna-in-Package Achieving 28dBm EIRP.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
IEEE Trans. Very Large Scale Integr. Syst., November, 2024
IEEE Trans. Circuits Syst. II Express Briefs, September, 2024
A Fully Integrated Stimulator With High Stimulation Voltage Compliance Using Dynamic Bulk Biasing Technique in a Bulk CMOS Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2024
A 211.4-to-234.8 GHz 25.6-dB Differential Amplifier With Compact Terminal Multi-Coupled and Auxiliary Interstage-Coupled Matching Networks.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
A 185-to-240 GHz SiGe Power Amplifier Using Non-Zero Base-Impedances for Power Gain and Output Power Optimizations.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2024
Switchable-coupled-inductor input-regulated Class-E converter at fixed 50%-duty-cycle 1-MHz switching signal.
Microelectron. J., 2024
2023
A Wide Input Range All-NMOS Rectifier With Gate Voltage Boosting Technique for Wireless Power Transfer.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2023
A Forecasting Model of Ionospheric foF2 Using the LSTM Network Based on ICEEMDAN Decomposition.
IEEE Trans. Geosci. Remote. Sens., 2023
IEEE J. Solid State Circuits, 2023
2022
Recent Progress of Silicon-Based Millimeter-Wave SoCs for Short-Range Radar Imaging and Sensing.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A 28GHz Compact 3-Way Transformer-Based Parallel-Series Doherty Power Amplifier With 20.4%/14.2% PAE at 6-/12-dB Power Back-off and 25.5dBm PSAT in 55nm Bulk CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
Design of a dB-Linear 21.5-to-36 GHz 6-bit RF-VGA with Accurate Gain Control in 0.13-μm SiGe BiCMOS Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2020
An Inverted Ring Oscillator Noise-Shaping Time-to-Digital Converter With In-Band Noise Reduction and Coherent Noise Cancellation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
2018
A Seven-Octave Broadband LNA MMIC Using Bandwidth Extension Techniques and Improved Active Load.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE Access, 2018
2017
IEEE J. Solid State Circuits, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Proceedings of the International Symposium on Integrated Circuits, 2016
2015
2.3 A 130-to-180GHz 0.0035mm<sup>2</sup> SPDT switch with 3.3dB loss and 23.7dB isolation in 65nm bulk CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
Proceedings of the International SoC Design Conference, 2011