Francis B. Moreira

Orcid: 0000-0002-0926-3865

Affiliations:
  • Federal University of Rio Grande do Sul, Porto Alegre, Brazil


According to our database1, Francis B. Moreira authored at least 18 papers between 2012 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of two.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

Online presence:

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Bibliography

2022
Efficient Machine Learning execution with Near-Data Processing.
Microprocess. Microsystems, April, 2022

Terminator: A Secure Coprocessor to Accelerate Real-Time AntiViruses Using Inspection Breakpoints.
ACM Trans. Priv. Secur., 2022

Vector In Memory Architecture for simple and high efficiency computing.
CoRR, 2022

Advancing Database System Operators with Near-Data Processing.
Proceedings of the 30th Euromicro International Conference on Parallel, 2022

Advancing Near-Data Processing with Precise Exceptions and Efficient Data Fetching.
Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

2021
Investigating memory prefetcher performance over parallel applications: From real to simulated.
Concurr. Comput. Pract. Exp., 2021

Machine Learning Migration for Efficient Near-Data Processing.
Proceedings of the 29th Euromicro International Conference on Parallel, 2021

2020
Attesting L-3 General Program Anomaly Detection Efficiency with SPADA.
Proceedings of the IEEE Symposium on Computers and Communications, 2020

2019
Memory Performance and Bottlenecks in Multicore and GPU Architectures.
Proceedings of the 27th Euromicro International Conference on Parallel, 2019

SPADA: a statistical program attack detection analysis.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2018
Predicting the Reliability Behavior of HPC Applications.
Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

2017
Exploiting Price and Performance Tradeoffs in Heterogeneous Clouds.
Proceedings of the Companion Proceedings of the 10th International Conference on Utility and Cloud Computing, 2017

Data mining the memory access stream to detect anomalous application behavior.
Proceedings of the Computing Frontiers Conference, 2017

2016
A dynamic block-level execution profiler.
Parallel Comput., 2016

2015
SiNUCA: A Validated Micro-Architecture Simulator.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Saving memory movements through vector processing in the DRAM.
Proceedings of the 2015 International Conference on Compilers, 2015

2014
Profiling and Reducing Micro-Architecture Bottlenecks at the Hardware Level.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

2012
Evaluating High Performance Computing on the Windows Azure Platform.
Proceedings of the 2012 IEEE Fifth International Conference on Cloud Computing, 2012


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