Frank Honoré

According to our database1, Frank Honoré authored at least 10 papers between 1993 and 2006.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

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Bibliography

2006
Energy-aware reconfigurable logic array.
PhD thesis, 2006

2005
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool.
Proceedings of the Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), 2005

A Power-Performance Scalable FPGA Using Configurable Voltage Domains and Design Mapping Tool.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
A leakage reduction methodology for distributed MTCMOS.
IEEE J. Solid State Circuits, 2004

2003
Design methodology for fine-grained leakage control in MTCMOS.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Power-aware architectures and circuits for FPGA-based signal processing.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

2000
Implementation options for WCDMA.
Proceedings of the IEEE International Conference on Acoustics, 2000

1997
A Unified System for Scheduled Communication.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1997

1996
NuMesh: An architecture optimized for scheduled communication.
J. Supercomput., 1996

1993
The NuMesh: A Modular, Scalable Communications Substrate.
Proceedings of the 7th international conference on Supercomputing, 1993


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