Frédéric Blanc

Affiliations:
  • KALRAY, Orsay, France


According to our database1, Frédéric Blanc authored at least 8 papers between 2004 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2016
Demo: MPPA<sup>®</sup> manycore processor towards future ADAS system solutions.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

2013
Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor.
Proceedings of the International Conference on Computational Science, 2013

2009
A Heuristic (delta, D) Digraph to Interpolate between Hypercube and de Bruijn Topologies for Future On-Chip Interconnection Networks.
Proceedings of the ICPPW 2009, 2009

2006
Control Unit for Parallel Embedded System.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

2005
A Low Complex Scheduling Algorithm for Multi-processor System-on-Chip.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2005

2004
RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems.
Proceedings of the Computer Systems: Architectures, 2004

Advances in Practical Implementation of the Digital Media Processing: Towards Reconfigurable Computation.
Proceedings of the Knowledge-Based Media Analysis for Self-Adaptive and Agile Multi-Media, 2004

An Auto-adaptative Reconfigurable Architecture for the Control.
Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004


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