Thierry Goubier

Orcid: 0000-0003-0872-4567

According to our database1, Thierry Goubier authored at least 22 papers between 2009 and 2022.

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Bibliography

2022
Leveraging High-Performance Computing and Cloud Computing with Unified Big-Data Workflows: The LEXIS Project.
Proceedings of the Technologies and Applications for Big Data Value, 2022

2021
Data Management Model to Program Irregular Compute Kernels on FPGA: Application to Heterogeneous Distributed System.
Proceedings of the Euro-Par 2021: Parallel Processing Workshops, 2021

Pre-Integrated Architectures for sustainable complex Cyber-Physical Systems.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2020
Fast Tsunami Simulations for a Real-Time Emergency Response Flow.
Proceedings of the IEEE/ACM HPC for Urgent Decision Making, UrgentHPC@SC 2020, Atlanta, GA, 2020

A combined fast/cycle accurate simulation tool for reconfigurable accelerator evaluation: application to distributed data management.
Proceedings of the International Workshop on Rapid System Prototyping, 2020

Real-Time Model of Computation over HPC/Cloud Orchestration - The LEXIS Approach.
Proceedings of the Complex, Intelligent and Software Intensive Systems, 2020

2019
Recursion, Probability, Convolution and Classification for Computations.
CoRR, 2019

Earthquake and Tsunami Workflow Leveraging the Modern HPC/Cloud Environment in the LEXIS Project.
Proceedings of the Advances in Networked-based Information Systems, 2019


2018
A Reflexive and Automated Approach to Syntactic Pattern Matching in Code Transformations.
Proceedings of the 2018 IEEE International Conference on Software Maintenance and Evolution, 2018

2017
M2DC - Modular Microserver DataCentre with heterogeneous hardware.
Microprocess. Microsystems, 2017

2016



2015
A Short Overview of Executing Γ Chemical Reactions over the ΣC and τ C Datafl w Programming Models.
Proceedings of the International Conference on Computational Science, 2015

2014
A Model of Computation for Real-Time Applications on Embedded Manycores.
Proceedings of the IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs, 2014

τ C: C with Process Network Extensions for Embedded Manycores.
Proceedings of the International Conference on Computational Science, 2014

Generating Code and Memory Buffers to Reorganize Data on Many-core Architectures.
Proceedings of the International Conference on Computational Science, 2014

2013
Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor.
Proceedings of the International Conference on Computational Science, 2013

2011
ΣC: A Programming Model and Language for Embedded Manycores.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2011

2009
A Heuristic (delta, D) Digraph to Interpolate between Hypercube and de Bruijn Topologies for Future On-Chip Interconnection Networks.
Proceedings of the ICPPW 2009, 2009

Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder.
Proceedings of the Reconfigurable Computing: Architectures, 2009


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