Raphaël David
According to our database1,
Raphaël David
authored at least 30 papers
between 1994 and 2014.
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Bibliography
2014
ACM Trans. Embed. Comput. Syst., 2014
2013
When processors get old: Evaluation of BTI and HCI effects on performance and reliability.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013
An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture.
Proceedings of the Design, Automation and Test in Europe, 2013
A fast and accurate methodology for power estimation and reduction of programmable architectures.
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2011
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Designing processors using MAsS, a modular and lightweight instruction-level exploration tool.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011
Synchronous Reactive Fine Grain Tasks Management for Homogeneous Many-Core Architectures.
Proceedings of the ARCS 2011, 2011
Impact of power management on temperature and reliability evolution for an embedded many-core architecture.
Proceedings of the ARCS 2011, 2011
2010
Les architectures parallèles sur puce. Synthèse des architectures multitâches pour les systèmes embarqués.
Tech. Sci. Informatiques, 2010
SESAM extension for fast MPSoC architectural exploration and dynamic streaming applications.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
Proceedings of the NOCS 2010, 2010
SCMP architecture: an asymmetric multiprocessor system-on-chip for dynamic applications.
Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies, 2010
Proceedings of the 17th International Conference on Telecommunications, 2010
Proceedings of the 10th IEEE International Conference on Computer and Information Technology, 2010
2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
Approximate-Timed Transactional Level Modeling for MPSoC Exploration: A Network-on-Chip Case Study.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
Proceedings of the Reconfigurable Computing: Architectures, 2009
2008
Structure mémoire reconfigurable. Vers une structure de stockage faible consommation.
Tech. Sci. Informatiques, 2008
EURASIP J. Embed. Syst., 2008
2007
Tech. Sci. Informatiques, 2007
2006
Control Unit for Parallel Embedded System.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006
2005
Tech. Sci. Informatiques, 2005
2002
DART: A Dynamically Reconfigurable Architecture Dealing with Future Mobile Telecommunications Constraints.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002
Mapping future generation mobile telecommunication applications on a dynamically reconfigurable arcidtecture.
Proceedings of the IEEE International Conference on Acoustics, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
2001
A Dynamically Reconfigurable Architecture for Low-Power Multimedia Terminals.
Proceedings of the SOC Design Methodologies, 2001
1994
Proceedings of the 4th Applied Natural Language Processing Conference, 1994