Stéphane Chevobbe

Orcid: 0000-0001-6907-097X

According to our database¹, Stéphane Chevobbe authored at least 29 papers between 2004 and 2023.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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In proceedings

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PhD thesis

Dataset

Other

Bibliography

2023

End-to-End Implementation of a Convolutional Neural Network on a 3D-Integrated Image Sensor with Macropixel Array.

[BibT_eX]

[DOI]

Sensors, February, 2023

A survey on real-time 3D scene reconstruction with SLAM methods in embedded systems.

[BibT_eX]

[DOI]

CoRR, 2023

2022

Image Quantization Towards Data Reduction: Robustness Analysis for SLAM Methods On Embedded Platforms.

[BibT_eX]

[DOI]

Proceedings of the 2022 IEEE International Conference on Image Processing, 2022

Work-in-Progress: Smart data reduction in SLAM methods for embedded systems.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Compilers, 2022

2019

A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing.

[BibT_eX]

[DOI]

Laurent Millet

Stéphane Chevobbe

Caaliph Andriamisaina

IEEE J. Solid State Circuits, 2019

Advanced 3D Technologies and Architectures for 3D Smart Image Sensors.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing.

[BibT_eX]

[DOI]

Laurent Millet

Stéphane Chevobbe

Caaliph Andriamisaina

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2015

Embedded wavelet-based face recognition under variable position.

[BibT_eX]

[DOI]

Pascal Cotret

Stéphane Chevobbe

Mehdi Darouich

Proceedings of the Real-Time Image and Video Processing 2015, 2015

2013

Use of wavelet for image processing in smart cameras with low hardware resources.

[BibT_eX]

[DOI]

J. Syst. Archit., 2013

SNet, a flexible, scalable network paradigm for manycore architectures.

[BibT_eX]

[DOI]

Proceedings of the 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2013

Gesture recognition on smart cameras.

[BibT_eX]

[DOI]

Aziz Dziri

Stéphane Chevobbe

Mehdi Darouich

Proceedings of the Sensors, 2013

2012

Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture.

[BibT_eX]

[DOI]

Int. J. Embed. Real Time Commun. Syst., 2012

2011

A small footprint interleaved multithreaded processor for embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Dynamic routing strategy for embedded distributed architectures.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Error prediction based on concurrent self-test and reduced slack time.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Service de reconfiguration prédictif pour plateforme multicoeur hétérogène.

[BibT_eX]

[DOI]

Stéphane Chevobbe

Stéphane Guyetant

Mehdi Darouich

Tech. Sci. Informatiques, 2010

CERA: A Channel Estimation Reconfigurable Architecture.

[BibT_eX]

[DOI]

Proceedings of the 17th International Conference on Telecommunications, 2010

Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architecture.

[BibT_eX]

[DOI]

Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

A wavelet-based demosaicking algorithm for embedded applications.

[BibT_eX]

[DOI]

Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

Exploration platform of embedded simd architecture for autonomous retinas.

[BibT_eX]

[DOI]

Stéphane Chevobbe

Suresh Pajaniradja

Laurent Letellier

Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

2009

Reducing Reconfiguration Overheads in Heterogeneous Multicore RSoCs with Predictive Configuration Management.

[BibT_eX]

[DOI]

Stéphane Chevobbe

Stéphane Guyetant

Int. J. Reconfigurable Comput., 2009

A multi-core signal processor for heterogeneous reconfigurable computing.

[BibT_eX]

[DOI]

Wolfram Putzke-Röming

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

A reconfigurable FIR/FFT unit for wireless telecommunication systems.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems.

[BibT_eX]

[DOI]

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

Reconfigurable Operator Based Multimedia Embedded Processor.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, 2009

2006

Control Unit for Parallel Embedded System.

[BibT_eX]

Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

2004

RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems.

[BibT_eX]

[DOI]

Proceedings of the Computer Systems: Architectures, 2004

Advances in Practical Implementation of the Digital Media Processing: Towards Reconfigurable Computation.

[BibT_eX]

Eva Dokládalová

Stéphane Chevobbe

Frédéric Blanc

Proceedings of the Knowledge-Based Media Analysis for Self-Adaptive and Agile Multi-Media, 2004

An Auto-adaptative Reconfigurable Architecture for the Control.

[BibT_eX]

[DOI]

Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

Stéphane Chevobbe

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