Frowin Buballa

According to our database1, Frowin Buballa authored at least 7 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A 12 GS/s RF-Sampler Employing Inductive Peaking with >57 dB |THD| and >49.3 dB SNDR in 22 nm FD-SOI CMOS.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A 10Bit 6 GS/s Time-Interleaved SAR ADC with a Single Full-Rate Front-End Track-and-Hold.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A 4 GBaud 5 Vpp Class-B Pre-Driver Design for GaN-Based Switching Power Amplifier in 22 nm SOI-CMOS Utilizing LDMOS.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A Charge Pump for Sub-Sampling Phase-Locked Loops with Virtual Reference Frequency Doubling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2021
A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch Correction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 12 Bit 500 MS/s Sub-2 Radix SAR ADC for a Time-Interleaved 8 GS/s ADC in 28 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
A 12 bit 8 GS/s Time-Interleaved SAR ADC in 28nm CMOS.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020


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