Gamana Aragonda

According to our database, Gamana Aragonda authored at least 5 papers between 2025 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

Closing the Loop in LLM-Based Hardware Generation: An Autonomous Agentic Workflow for Robust TPU Design.

Deepak Vungarala, Kartik Pandit, Gamana Aragonda, Jeremy McLynch, Adeola Adeoye-Davids, Bryan Galecio, NhatHai Phan, Abdallah Khreishah, Ramtin Zand, Arnob Ghosh, Shaahin Angizi

Proceedings of the 44th IEEE VLSI Test Symposium, 2026

Late Breaking Results: Thermally Assisted RowPress-RowHammer Synergy for Cross-Row Bit Flips.

Filip Roth Trønnes-Christensen, Ranyang Zhou, Gamana Aragonda, Abeer Matar A. Almalky, Mohaiminul Al Nahian, Adnan Siraj Rakin, Shaahin Angizi

Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025

CacheTrap: Injecting Trojans in LLMs without Leaving any Traces in Inputs or Weights.

Mohaiminul Al Nahian, Abeer Matar A. Almalky, Gamana Aragonda, Ranyang Zhou, Sabbir Ahmed, Dmitry Ponomarev, Li Yang, Shaahin Angizi, Adnan Siraj Rakin

CoRR, November, 2025

EIM-TRNG: Obfuscating Deep Neural Network Weights with Encoding-in-Memory True Random Number Generator via RowHammer.

Ranyang Zhou, Abeer Matar A. Almalky, Gamana Aragonda, Sabbir Ahmed, Filip Roth Trønnes-Christensen, Adnan Siraj Rakin, Shaahin Angizi

CoRR, July, 2025

Maximizing Sub-Array Resource Utilization in Digital Processing-in-Memory: A Versatile Hardware-Aware Approach.

Gamana Aragonda, Deniz Najafi, Deepak Vungarala, Sepehr Tabrizchi, Arman Roohi, Shaahin Angizi

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025