Sepehr Tabrizchi

According to our database1, Sepehr Tabrizchi authored at least 9 papers between 2016 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
A novel method for reduction partial product tree in ternary multiplier.
Microelectron. J., 2020

Designing positive, negative and standard gates for ternary logics using quantum dot cellular automata.
Comput. Electr. Eng., 2020

2019
An energy-based heterogeneity measure for quantifying structural irregularity in complex networks.
J. Comput. Sci., 2019

Novel CNFET ternary circuit techniques for high-performance and energy-efficient design.
IET Circuits Devices Syst., 2019

High performance, variation-tolerant CNFET ternary full adder a process, voltage, and temperature variation-resilient design.
Comput. Electr. Eng., 2019

2018
Energy Efficient Tri-State CNFET Ternary Logic Gates.
CoRR, 2018

2017
A novel ternary half adder and multiplier based on carbon nanotube field effect transistors.
Frontiers Inf. Technol. Electron. Eng., 2017

Method for designing ternary adder cells based on CNFETs.
IET Circuits Devices Syst., 2017

2016
A Novel Design Approach for Ternary Compressor Cells Based on CNTFETs.
Circuits Syst. Signal Process., 2016


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