Ramtin Zand

According to our database, Ramtin Zand authored at least 46 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Lightator: An Optical Near-Sensor Accelerator with Compressive Acquisition Enabling Versatile Image Processing.

Mehrdad Morsali, Brendan Reidy, Deniz Najafi, Sepehr Tabrizchi, Mohsen Imani, Mahdi Nikdast, Arman Roohi, Ramtin Zand, Shaahin Angizi

CoRR, 2024

2023

Work in Progress: Real-time Transformer Inference on Edge AI Accelerators.

Brendan Reidy, Mohammadreza Mohammadi, Mohammed E. Elbtity, Heath Smith, Ramtin Zand

Proceedings of the 29th IEEE Real-Time and Embedded Technology and Applications Symposium, 2023

Application of Machine Learning for Quality Risk Factor Analysis of Electronic Assemblies.

Brendan Reidy, David Duggan, Bernard Glasauer, Peng Su, Ramtin Zand

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

A Novel Stochastic LSTM Model Inspired by Quantum Machine Learning.

Joseph Lindsay, Ramtin Zand

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Realtime Facial Expression Recognition: Neuromorphic Hardware vs. Edge AI Accelerators.

Heath Smith, James Seekings, Mohammadreza Mohammadi, Ramtin Zand

Proceedings of the International Conference on Machine Learning and Applications, 2023

Caveline Detection at the Edge for Autonomous Underwater Cave Exploration and Mapping.

Mohammadreza Mohammadi, Sheng-En Huang, Titon Barua, Ioannis M. Rekleitis, Md Jahidul Islam, Ramtin Zand

Proceedings of the International Conference on Machine Learning and Applications, 2023

Facial Expression Recognition at the Edge: CPU vs GPU vs VPU vs TPU.

Mohammadreza Mohammadi, Heath Smith, Lareb Khan, Ramtin Zand

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

Heterogeneous Integration of In-Memory Analog Computing Architectures with Tensor Processing Units.

Mohammed E. Elbtity, Brendan Reidy, Md Hasibul Amin, Ramtin Zand

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

IMAC-Sim: : A Circuit-level Simulator For In-Memory Analog Computing Architectures.

Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

2022

Static hand gesture recognition for American sign language using neuromorphic hardware.

Mohammadreza Mohammadi, Peyton Chandarana, James Seekings, Sara Hendrix, Ramtin Zand

Neuromorph. Comput. Eng., December, 2022

APTPU: Approximate Computing Based Tensor Processing Unit.

Mohammed E. Elbtity, Peyton Chandarana, Brendan Reidy, Jason Kamran Eshraghian, Ramtin Zand

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Xbar-Partitioning: A Practical Way for Parasitics and Noise Tolerance in Analog IMC Circuits.

Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Reliability-Aware Deployment of DNNs on In-Memory Analog Computing Architectures.

Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand

CoRR, 2022

A Python Framework for SPICE Circuit Simulation of In-Memory Analog Computing Circuits.

Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand

CoRR, 2022

Static Hand Gesture Recognition for American Sign Language using Neuromorphic Hardware.

Mohammedreza Mohammadi, Peyton Chandarana, James Seekings, Sara Hendrix, Ramtin Zand

CoRR, 2022

Interconnect Parasitics and Partitioning in Fully-Analog In-Memory Computing Architectures.

Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Energy-Efficient Deployment of Machine Learning Workloads on Neuromorphic Hardware.

Peyton Chandarana, Mohammadreza Mohammadi, James Seekings, Ramtin Zand

Proceedings of the 13th IEEE International Green and Sustainable Computing Conference, 2022

MRAM-based Analog Sigmoid Function for In-memory Computing.

Md Hasibul Amin, Mohammed E. Elbtity, Mohammadreza Mohammadi, Ramtin Zand

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021

Probabilistic Interpolation Recoder for Energy-Error-Product Efficient DBNs With p-Bit Devices.

Hossein Pourmeidani, Shadi Sheikhfaal, Ramtin Zand, Ronald F. DeMara

IEEE Trans. Emerg. Top. Comput., 2021

An In-Memory Analog Computing Co-Processor for Energy-Efficient CNN Inference on Mobile Devices.

Mohammed E. Elbtity, Abhishek Singh, Brendan Reidy, Xiaochen Guo, Ramtin Zand

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

An Adaptive Sampling and Edge Detection Approach for Encoding Static Images for Spiking Neural Networks.

Peyton Chandarana, Junlin Ou, Ramtin Zand

Proceedings of the 12th International Green and Sustainable Computing Workshops, 2021

2020

Hardware-Algorithm Co-Design of a Compressed Fuzzy Active Learning Method.

Ehsan Jokar, Sajad Haghzad Klidbary, Hadis Abolfathi, Saeed Bagheri Shouraki, Ramtin Zand, Arash Ahmadi

IEEE Trans. Circuits Syst., 2020

A Single-Cycle MLP Classifier Using Analog MRAM-based Neurons and Synapses.

Ramtin Zand

CoRR, 2020

SOT-MRAM based Sigmoidal Neuron for Neuromorphic Architectures.

Brendan Reidy, Ramtin Zand

CoRR, 2020

Electrically-Tunable Stochasticity for Spin-based Neuromorphic Circuits: Self-Adjusting to Variation.

Hossein Pourmeidani, Punyashloka Debashis, Zhihong Chen, Ronald F. DeMara, Ramtin Zand

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

TSV Extrusion Morphology Classification Using Deep Convolutional Neural Networks.

Brendan Reidy, Golareh Jalilvand, Tengfei Jiang, Ramtin Zand

Proceedings of the 19th IEEE International Conference on Machine Learning and Applications, 2020

2019

MRAM-Enhanced Low Power Reconfigurable Fabric With Multi-Level Variation Tolerance.

Ramtin Zand, Ronald F. DeMara

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Composable Probabilistic Inference Networks Using MRAM-based Stochastic Neurons.

Ramtin Zand, Kerem Yunus Camsari, Supriyo Datta, Ronald F. DeMara

ACM J. Emerg. Technol. Comput. Syst., 2019

Self-Organized Sub-bank SHE-MRAM-based LLC: An energy-efficient and variation-immune read and write architecture.

Soheil Salehi, Navid Khoshavi, Ramtin Zand, Ronald F. DeMara

Integr., 2019

AQuRate: MRAM-based Stochastic Oscillator for Adaptive Quantization Rate Sampling of Sparse Signals.

Soheil Salehi, Ramtin Zand, Alireza Zaeemzadeh, Nazanin Rahnavard, Ronald F. DeMara

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Clockless Spin-based Look-Up Tables with Wide Read Margin.

Soheil Salehi, Ramtin Zand, Ronald F. DeMara

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

HSC-FPGA.

Ramtin Zand, Ronald F. DeMara

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018

A Parity-Preserving Reversible QCA Gate with Self-Checking Cascadable Resiliency.

Arman Roohi, Ramtin Zand, Shaahin Angizi, Ronald F. DeMara

IEEE Trans. Emerg. Top. Comput., 2018

Survivability Modeling and Resource Planning for Self-Repairing Reconfigurable Device Fabrics.

Rashad S. Oreifej, Rawad N. Al-Haddad, Ramtin Zand, Rizwan A. Ashraf, Ronald F. DeMara

IEEE Trans. Cybern., 2018

Synthesis of normally-off boolean circuits: An evolutionary optimization approach utilizing spintronic devices.

Arman Roohi, Ramtin Zand, Ronald F. DeMara

Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

SNRA: A Spintronic Neuromorphic Reconfigurable Array for In-Circuit Training and Evaluation of Deep Belief Networks.

Ramtin Zand, Ronald F. DeMara

Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018

Low-Energy Deep Belief Networks Using Intrinsic Sigmoidal Spintronic-based Probabilistic Neurons.

Ramtin Zand, Kerem Yunus Camsari, Steven D. Pyle, Ibrahim Ahmed, Chris H. Kim, Ronald F. DeMara

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Logic-Encrypted Synthesis for Energy-Harvesting-Powered Spintronic-Embedded Datapath Design.

Arman Roohi, Ramtin Zand, Ronald F. DeMara

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2017

Energy-Efficient and Process-Variation-Resilient Write Circuit Schemes for Spin Hall Effect MRAM Device.

Ramtin Zand, Arman Roohi, Ronald F. DeMara

IEEE Trans. Very Large Scale Integr. Syst., 2017

Voltage-Based Concatenatable Full Adder Using Spin Hall Effect Switching.

Arman Roohi, Ramtin Zand, Deliang Fan, Ronald F. DeMara

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Heterogeneous energy-sparing reconfigurable logic: spin-based storage and CNFET-based multiplexing.

Mohan Krishna Gopi Krishna, Arman Roohi, Ramtin Zand, Ronald F. DeMara

IET Circuits Devices Syst., 2017

R-DBN: A Resistive Deep Belief Network Architecture Leveraging the Intrinsic Behavior of Probabilistic Devices.

Ramtin Zand, Kerem Yunus Camsari, Ibrahim Ahmed, Steven D. Pyle, Chris H. Kim, Supriyo Datta, Ronald F. DeMara

CoRR, 2017

Heterogeneous Technology Configurable Fabrics for Field-Programmable Co-Design of CMOS and Spin-Based Devices.

Ronald F. DeMara, Arman Roohi, Ramtin Zand, Steven D. Pyle

Proceedings of the IEEE International Conference on Rebooting Computing, 2017

2016

Scalable Adaptive Spintronic Reconfigurable Logic Using Area-Matched MTJ Design.

Ramtin Zand, Arman Roohi, Soheil Salehi, Ronald F. DeMara

IEEE Trans. Circuits Syst. II Express Briefs, 2016

2015

Adaptive Mitigation of Radiation-Induced Errors and TDDB in Reconfigurable Logic Fabrics.

Rawad N. Al-Haddad, Rashad S. Oreifej, Ramtin Zand, Abdel Ejnioui, Ronald F. DeMara

Proceedings of the 24th IEEE North Atlantic Test Workshop, 2015

Reactive rejuvenation of CMOS logic paths using self-activating voltage domains.

Rizwan A. Ashraf, Ahmad Alzahrani, Navid Khoshavi, Ramtin Zand, Soheil Salehi, Arman Roohi, Mingjie Lin, Ronald F. DeMara

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015