Deniz Najafi

Orcid: 0009-0008-2734-8935

According to our database1, Deniz Najafi authored at least 21 papers between 2023 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Light-Bound Transformers: Hardware-Anchored Robustness for Silicon-Photonic Computer Vision Systems.
CoRR, April, 2026

Opto-Aligner: Optical Near-Sensor Architecture for Accelerating DNA Pre-Alignment Filtering.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2026

Shallow Enough? A Cross-Architecture Study of Ultra-Low-Depth Neural Networks for Edge Inference.
Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

Photonics-Enabled Edge Processing: A Vision for Near-Sensor Optical Intelligence.
Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

INSPIRE: In-Sensor Compressed Weight Retrieval for Enhancing ViT Efficiency at Edge.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025
Neuro-Photonix: Enabling Near-Sensor Neuro-Symbolic AI Computing on Silicon Photonics Substrate.
IEEE Trans. Circuits Syst. Artif. Intell., June, 2025

From Pixels to Reasoning: A Cross-Layer Photonic Design for Edge Visual Intelligence.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025

Opto-ViT: Architecting a Near-Sensor Region of Interest-Aware Vision Transformer Accelerator with Silicon Photonics.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

Magnetic In/Near-Sensor Architectures: From Raw Sensing to Smart Processing.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

Event-Driven Spatiotemporal Processing-In-Sensor with Phase Change Memory-based Optical Acceleration.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

Maximizing Sub-Array Resource Utilization in Digital Processing-in-Memory: A Versatile Hardware-Aware Approach.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

DeepCompress-ViT: Rethinking Model Compression to Enhance Efficiency of Vision Transformers at the Edge.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2025

Dyna-Optics: Architecting a Channel-Adaptive DNN Near-Sensor Optical Accelerator for Dynamic Inference.
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2025

2024
ViTSen: Bridging Vision Transformers and Edge Computing With Advanced In/Near-Sensor Processing.
IEEE Embed. Syst. Lett., December, 2024

DECO: Dynamic Energy-aware Compression and Optimization for In-Memory Neural Networks.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

ResSen: Imager Privacy Enhancement Through Residue Arithmetic Processing in Sensors.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

Hybrid Magneto-electric FET-CMOS Integrated Memory Design for Instant-on Computing.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

OISA: Architecting an Optical In-Sensor Accelerator for Efficient Visual Computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Lightator: An Optical Near-Sensor Accelerator with Compressive Acquisition Enabling Versatile Image Processing.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Enabling Normally-off In-Situ Computing with a Magneto-Electric FET-based SRAM Design.
CoRR, 2023

Accelerating Low Bit-width Neural Networks at the Edge, PIM or FPGA: A Comparative Study.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023


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