Gareth W. Morris

According to our database, Gareth W. Morris authored at least 5 papers between 2004 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

FPGA Accelerated Low-Latency Market Data Feed Processing.

Gareth W. Morris, David B. Thomas, Wayne Luk

Proceedings of the 17th IEEE Symposium on High Performance Interconnects, 2009

2007

ROM to DSP block transfer for resource constrained synthesis.

Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung

IET Comput. Digit. Tech., 2007

Design Space Exploration of the European Option Benchmark Using HyperStreams.

Gareth W. Morris, Matthew Aubury

Proceedings of the FPL 2007, 2007

2005

Using DSP Blocks For ROM Replacement: A Novel Synthesis Flow.

Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004

Migrating Functionality from ROMS to Embedded Multipliers.

Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung

Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004