Garima Thakral

According to our database, Garima Thakral authored at least 9 papers between 2010 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2014

Variability-aware design of double gate FinFET-based current mirrors.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral, Oghenekarho Okobiah

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2013

Fast optimization of nano-CMOS voltage-controlled oscillator using polynomial regression and genetic algorithm.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral

Microelectron. J., 2013

Comparative analysis of double gate FinFET configurations for analog circuit design.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Double gate FinFET based mixed-signal design: A VCO case study.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Fast analog design optimization using regression-based modeling and genetic algorithm: A nano-CMOS VCO case study.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral

Proceedings of the International Symposium on Quality Electronic Design, 2013

2010

DOE-ILP Based Simultaneous Power and Read Stability Optimization in Nano-CMOS SRAM.

Garima Thakral, Saraju P. Mohanty, Dhiraj K. Pradhan, Elias Kougianos

J. Low Power Electron., 2010

A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM.

Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

P3 (power-performance-process) optimization of nano-CMOS SRAMusing statistical DOE-ILP.

Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

A DOE-ILP assisted conjugate-gradient based power and stability optimization in High-K Nano-CMOS SRAM.

Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010