George L. Geannopoulos

According to our database, George L. Geannopoulos authored at least 6 papers between 1996 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process.

Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, George L. Geannopoulos, Jonathan Douglas, Nasser A. Kurd

IEEE J. Solid State Circuits, 2016

2007

Advanced thermal sensing circuit and test techniques used in a high performance 65nm processor.

David E. Duarte, Greg Taylor, Keng L. Wong, Usman Mughal, George L. Geannopoulos

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Temperature Sensor Design in a High Volume Manufacturing 65nm CMOS Digital Process.

David E. Duarte, George L. Geannopoulos, Usman Mughal, Keng L. Wong, Greg Taylor

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2005

Low-voltage swing logic circuits for a Pentium® 4 processor integer core.

Daniel J. Deleganes, Micah Barany, George L. Geannopoulos, Kurt Kreitzer, Matthew Morrise, Dan Milliron, Anant P. Singh, Sapumal B. Wijeratne

IEEE J. Solid State Circuits, 2005

2004

Low voltage swing logic circuits for a Pentium 4 processor integer core.

Daniel J. Deleganes, Micah Barany, George L. Geannopoulos, Kurt Kreitzer, Anant P. Singh, Sapumal B. Wijeratne

Proceedings of the 41th Design Automation Conference, 2004

1996

A high performance 0.35-μm 3.3-V BiCMOS technology optimized for product porting from a 0.6-μm 3.3-V BiCMOS technology.

Jashojiban Banik, Keng L. Wong, George L. Geannopoulos, Chung Y. Joseph Yip

IEEE J. Solid State Circuits, 1996