George Razvan Voicu

According to our database1, George Razvan Voicu authored at least 15 papers between 2010 and 2018.

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Bibliography

2018
Low-Leakage 3D Stacked Hybrid NEMFET-CMOS Dual Port Memory.
IEEE Trans. Emerg. Top. Comput., 2018

2017
High-Performance, Cost-Effective 3D Stacked Wide-Operand Adders.
IEEE Trans. Emerg. Top. Comput., 2017

Low cost multi-error correction for 3D polyhedral memories.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

LDPC-Based Adaptive Multi-Error Correction for 3D Memories.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

2015
A shared polyhedral cache for 3D wide-I/O multi-core computing platforms.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Energy effective 3D stacked hybrid NEMFET-CMOS caches.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014

2013
Towards heterogenous 3D-stacked reliable computing with von Neumann multiplexing.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

Is TSV-based 3D integration suitable for inter-die memory repair?
Proceedings of the Design, Automation and Test in Europe, 2013

3D stacked wide-operand adders: A case study.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
Zero-performance-overhead online fault detection and diagnosis in 3D stacked integrated circuits.
Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Is the road towards "Zero-Energy" paved with NEMFET-based power management?
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 3D stacked high performance scalable architecture for 3D Fourier Transform.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011
An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set 2n+1, 2n, 2n-1.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Towards "zero-energy" using NEMFET-based power management for 3D hybrid stacked ICs.
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011

2010
Memoryless RNS-to-binary converters for the {2<sup>n+1</sup> - 1, 2<sup>n</sup>, 2<sup>n</sup> - 1} moduli set.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010


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