Georgios Chatzitsompanis

Orcid: 0000-0002-3358-7181

According to our database1, Georgios Chatzitsompanis authored at least 5 papers between 2023 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Late Breaking Results - Compressed Bit-Level Timing-Error Predictors via Binary Neural Networks.
Proceedings of the 44th IEEE VLSI Test Symposium, 2026

2024
Enabling Voltage Over-Scaling in Multiplierless DSP Architectures via Algorithm-Hardware Co-Design.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024

Adaptive approximate computing in edge AI and IoT applications: A review.
J. Syst. Archit., 2024

ePredictNet: Low Cost Error Prediction Neural Network.
Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024

2023
On the Facilitation of Voltage Over-Scaling and Minimization of Timing Errors in Floating-Point Multipliers.
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023


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