Gerard Lassche

According to our database, Gerard Lassche authored at least 4 papers between 2016 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A 3.2mW SAR-assisted CTΔ∑ ADC with 77.5dB SNDR and 40MHz BW in 28nm CMOS.

Pierluigi Cenci, Muhammed Bolatkale, Robert Rutten, M. Ganzerli, Gerard Lassche, Kofi A. A. Makinwa, Lucien J. Breems

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2017

A 28 nm 2 GS/s 5-b single-channel SAR ADC with gm-boosted StrongARM comparator.

Pierluigi Cenci, Muhammed Bolatkale, Robert Rutten, Gerard Lassche, Kofi A. A. Makinwa, Lucien J. Breems

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016

A 2.2 GHz Continuous-Time ΔΣ ADC With -102 dBc THD and 25 MHz Bandwidth.

Lucien J. Breems, Muhammed Bolatkale, Hans Brekelmans, Shagun Bajoria, Jan Niehof, Robert Rutten, Bert Oude-Essink, Franco Fritschij, Jagdip Singh, Gerard Lassche

IEEE J. Solid State Circuits, 2016

15.2 A 2.2GHz continuous-time ΔΣ ADC with -102dBc THD and 25MHz BW.

Lucien J. Breems, Muhammed Bolatkale, Hans Brekelmans, Shagun Bajoria, Jan Niehof, Robert Rutten, Bert Oude-Essink, Franco Fritschij, Jagdip Singh, Gerard Lassche

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016