Giovanni Fiorenza
According to our database1,
Giovanni Fiorenza
authored at least 9 papers
between 2003 and 2008.
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Bibliography
2008
New simulation methodology for effects of radiation in semiconductor chip structures.
IBM J. Res. Dev., 2008
2007
Impact of interconnect length changes on effective materials properties (dielectric constant).
Proceedings of the Ninth International Workshop on System-Level Interconnect Prediction (SLIP 2007), 2007
2005
Microminiature packaging and integrated circuitry: The work of E. F. Rent, with an application to on-chip interconnection requirements.
IBM J. Res. Dev., 2005
Predicting interconnect requirements in ultra-large-scale integrated control logic circuitry.
Proceedings of the Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), 2005
Characterization of the impact of interconnect design on the capacitive load driven by a global clock distribution.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
2004
Interpretation of rent's rule for ultralarge-scale integrated circuit designs, with an application to wirelength distribution models.
IEEE Trans. Very Large Scale Integr. Syst., 2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
Estimating the efficiency of collaborative problem-solving, with applications to chip design.
IBM J. Res. Dev., 2003