According to our database1, Heesoo Song authored at least 4 papers between 2009 and 2011.
Legend:Book In proceedings Article PhD thesis Other
A 1.0-4.0-Gb/s All-Digital CDR With 1.0-ps Period Resolution DCO and Adaptive Proportional Gain Control.
IEEE J. Solid State Circuits, 2011
A 13.8mW 3.0Gb/s clock-embedded video interface with DLL-based data-recovery circuit.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
IEEE J. Solid State Circuits, 2010
A PVT-insensitive time-to-digital converter using fractional difference Vernier delay lines.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009