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Heng Wu

Affiliations:
  • Peking University, School of Integrated Circuits (School of IC), Beijing, China


According to our database1, Heng Wu authored at least 4 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Standard Cell Layout Synthesis for Dual-Sided 3D-Stacked Transistors.
[BibTeX]
[DOI]
Kairong Guo
,
Haoran Lu
,
Rui Guo
,
Jiarui Wang
,
Chunyuan Zhao
,
Heng Wu
,
Runsheng Wang
,
Yibo Lin
Proceedings of the 31st Asia and South Pacific Design Automation Conference, 2026

2025
A Tale of Two Sides of Wafer: Physical Implementation and Block-Level PPA on Flip FET with Dual-Sided Signals.
[BibTeX]
[DOI]
Haoran Lu
,
Xun Jiang
,
Yanbang Chu
,
Ziqiao Xu
,
Rui Guo
,
Wanyue Peng
,
Yibo Lin
,
Runsheng Wang
,
Heng Wu
,
Ru Huang
Proceedings of the Design, Automation & Test in Europe Conference, 2025

A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis.
[BibTeX]
[DOI]
Xun Jiang
,
Haoran Lu
,
Yuxuan Zhao
,
Jiarui Wang
,
Zizheng Guo
,
Heng Wu
,
Bei Yu
,
Sung Kyu Lim
,
Runsheng Wang
,
Ru Huang
,
Yibo Lin
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024
First Experimental Demonstration of Self-Aligned Flip FET (FFET): A Breakthrough Stacked Transistor Technology with 2.5T Design, Dual-Side Active and Interconnects.
[BibTeX]
[DOI]
Haoran Lu
,
Yandong Ge
,
Xun Jiang
,
Jiacheng Sun
,
Wanyue Peng
,
Rui Guo
,
Ming Li
,
Yibo Lin
,
Runsheng Wang
,
Heng Wu
,
Ru Huang
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024


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