Hidemi Ishiuchi

According to our database1, Hidemi Ishiuchi authored at least 3 papers between 1990 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2006
Low-power logic circuit and SRAM cell applications with silicon on depletion Layer CMOS (SODEL CMOS) technology.
IEEE J. Solid State Circuits, 2006

1999

1990
A latch-up-like new failure mechanism for high-density CMOS dynamic RAMs.
IEEE J. Solid State Circuits, February, 1990


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