Tohru Furuyama

According to our database1, Tohru Furuyama authored at least 8 papers between 1999 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2006, "For contributions to high speed dynamic random access memory (DRAM) design and technologies.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2010
A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes.
IEEE J. Solid State Circuits, 2010

2009

2007
Keynote address: Challenges of digital consumer and mobile SoC's: more Moore possible?
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Deep Sub-100 nm Design Challenges.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

2004
Trends and challenges of large scale embedded memories.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2001
A Single-Chip Low-Power Mpeg-4 Audiovisual Lsi Using Embedded Dram Technology.
Proceedings of the 2001 IEEE International Conference on Multimedia and Expo, 2001

2000
A scalable MPEG-4 video codec architecture for IMT-2000 multimedia applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Variable supply-voltage scheme with 95%-efficiency DC-DC converter for MPEG-4 codec.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999


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