Hideo Wada

According to our database1, Hideo Wada authored at least 10 papers between 1988 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
Mass formula and structure of self-dual codes over Z<sub>2<sup>s</sup></sub>.
Des. Codes Cryptogr., 2013

2009
The number of self-dual codes over <i>Z</i><sub><i>p</i><sup>3</sup></sub>{Z_{p^3}}.
Des. Codes Cryptogr., 2009

On Self-dual Codes over Z16.
Proceedings of the Applied Algebra, 2009

1997
Deadlock-Free Fault-tolerant Routing in the Multi-dimensional Crossbar Network and Its Implementation for the Hitachi SR2201.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

Architecture and Performance of the Hitachi SR2201 Massively Parallel Processor System.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

1993
A Scalar Architecture for Pseudo Vector Processing Based on Slide-Windowed Registers.
Proceedings of the 7th international conference on Supercomputing, 1993

1989
An Overview of the HITACHI S-820 Supercomputer System.
Proceedings of the Supercomputer'89: Anwendungen, Architekturen, Trends, 1989

High-speed storage control schemes of HITACHI supercomputer S-820 system.
Proceedings of the 3rd international conference on Supercomputing, 1989

1988
High-speed processing schemes for summation type and iteration type vector instructions on Hitachi supercomputer S-820 system.
Proceedings of the 2nd international conference on Supercomputing, 1988

High-Speed Vector Instruction Execution Schemes of HITACHI Supercomputer S-820 System.
Proceedings of the International Conference on Parallel Processing, 1988


  Loading...