Hisashige Ando

According to our database, Hisashige Ando authored at least 7 papers between 2003 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

NSIM: An Interconnection Network Simulator for Extreme-Scale Parallel Computers.

Hideki Miwa, Ryutaro Susukita, Hidetomo Shibamura, Tomoya Hirao, Jun Maki, Makoto Yoshida, Takayuki Kando, Yuichiro Ajima, Ikuo Miyoshi, Toshiyuki Shimizu, Yuji Oinaga, Hisashige Ando, Yuichi Inadomi, Koji Inoue, Mutsumi Aoyagi, Kazuaki J. Murakami

IEICE Trans. Inf. Syst., 2011

2008

Performance prediction of large-scale parallell system and application using macro-level simulation.

Ryutaro Susukita, Hisashige Ando, Mutsumi Aoyagi, Hiroaki Honda, Yuichi Inadomi, Koji Inoue, Shigeru Ishizuki, Yasunori Kimura, Hidemi Komatsu, Motoyoshi Kurokawa, Kazuaki J. Murakami, Hidetomo Shibamura, Shuji Yamamura, Yunqing Yu

Proceedings of the ACM/IEEE Conference on High Performance Computing, 2008

Validation of hardware error recovery mechanisms for the SPARC64 V microprocessor.

Hisashige Ando, Ryuji Kan, Yoshiharu Tosaka, Keiji Takahisa, Kichiji Hatanaka

Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2008

2006

High-Speed Interconnect for a Multiprocessor Server Using Over 1Tb/s Crossbar.

Jun Yamada, Hiroyuki Adachi, Yutaka Mori, Akihiko Harada, Seishi Okada, Hisashige Ando

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A Case Study: Power and Performance Improvement of a Chip Multiprocessor for Transaction Processing.

Hisashige Ando, Nestoras Tzartzanis, William W. Walker

IEEE Trans. Very Large Scale Integr. Syst., 2005

2003

A 1.3-GHz fifth-generation SPARC64 microprocessor.

Hisashige Ando, Yuuji Yoshida, Aiichiro Inoue, Itsumi Sugiyama, Takeo Asakawa, Kuniki Morita, Toshiyuki Muta, Tsuyoshi Motokurumada, Seishi Okada, Hideo Yamashita, Yoshihiko Satsukawa, Akihiko Konmoto, Ryouichi Yamashita, Hiroyuki Sugiyama

IEEE J. Solid State Circuits, 2003

A 1.3GHz fifth generation SPARC64 microprocessor.

Hisashige Ando, Yuuji Yoshida, Aiichiro Inoue, Itsumi Sugiyama, Takeo Asakawa, Kuniki Morita, Toshiyuki Muta, Tsuyoshi Motokurumada, Seishi Okada, Hideo Yamashita, Yoshihiko Satsukawa, Akihiko Konmoto, Ryouichi Yamashita, Hiroyuki Sugiyama

Proceedings of the 40th Design Automation Conference, 2003