Hongjing Huang

Orcid: 0000-0003-1387-7955

According to our database¹, Hongjing Huang authored at least 9 papers between 2020 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

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Bibliography

2024

SparseACC: A Generalized Linear Model Accelerator for Sparse Datasets.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024

2023

P4SGD: Programmable Switch Enhanced Model-Parallel Training on Generalized Linear Models on Distributed FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., August, 2023

P4SGD: Programmable Switch Enhanced Model-Parallel Training on Generalized Linear Models on Distributed FPGAs.

[BibT_eX]

[DOI]

CoRR, 2023

SmartDS: Middle-Tier-centric SmartNIC Enabling Application-aware Message Split for Disaggregated Block Storage.

[BibT_eX]

[DOI]

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022

Shuhai: A Tool for Benchmarking High Bandwidth Memory on FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2022

FpgaNIC: An FPGA-based Versatile 100Gb SmartNIC for GPUs.

[BibT_eX]

[DOI]

Proceedings of the 2022 USENIX Annual Technical Conference, 2022

2020

Optimizing Memory Performance of Xilinx FPGAs under Vitis.

[BibT_eX]

[DOI]

CoRR, 2020

Benchmarking High Bandwidth Memory on FPGAs.

[BibT_eX]

[DOI]

CoRR, 2020

Shuhai: Benchmarking High Bandwidth Memory On FPGAS.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

Hongjing Huang

Timeline

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Bibliography

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