Lingjun Zhu

Orcid: 0009-0001-5145-6097

According to our database1, Lingjun Zhu authored at least 31 papers between 2013 and 2024.

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Bibliography

2024
A PPA Study for Heterogeneous 3-D IC Options: Monolithic, Hybrid Bonding, and Microbumping.
IEEE Trans. Very Large Scale Integr. Syst., March, 2024

Demystifying Datapath Accelerator Enhanced Off-path SmartNIC.
CoRR, 2024

What's the Story in EBS Glory: Evolutions and Lessons in Building Cloud Block Store.
Proceedings of the 22nd USENIX Conference on File and Storage Technologies, 2024

2023
On Continuing DNN Accelerator Architecture Scaling Using Tightly Coupled Compute-on-Memory 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst., October, 2023

Buffer-Based High-Coverage and Low-Overhead Request Event Monitoring in the Cloud.
IEEE/ACM Trans. Netw., August, 2023

What are the actual needs of visually impaired people?
Displays, July, 2023

Deploying User-space TCP at Cloud Scale with LUNA.
Proceedings of the 2023 USENIX Annual Technical Conference, 2023

A Comparative Study on Front-Side, Buried and Back-Side Power Rail Topologies in 3nm Technology Node.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

SmartDS: Middle-Tier-centric SmartNIC Enabling Application-aware Message Split for Disaggregated Block Storage.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

INVITED: Design Automation Needs for Monolithic 3D ICs: Accomplishments and Gaps.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity Benefits.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Design Automation and Test Solutions for Monolithic 3D ICs.
ACM J. Emerg. Technol. Comput. Syst., 2022

From luna to solar: the evolutions of the compute-to-storage networks in Alibaba cloud.
Proceedings of the SIGCOMM '22: ACM SIGCOMM 2022 Conference, Amsterdam, The Netherlands, August 22, 2022

Buffer-based End-to-end Request Event Monitoring in the Cloud.
Proceedings of the 19th USENIX Symposium on Networked Systems Design and Implementation, 2022

3D IC Tier Partitioning of Memory Macros: PPA vs. Thermal Tradeoffs.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

2021
High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Identification of key genes, pathways, and associated comorbidities in chikungunya infection: insights from system biology analysis.
Netw. Model. Anal. Health Informatics Bioinform., 2021

Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Physical Design Challenges and Solutions for Emerging Heterogeneous 3D Integration Technologies.
Proceedings of the ISPD '21: International Symposium on Physical Design, 2021

Power Delivery and Thermal-Aware Arm-Based Multi-Tier 3D Architecture.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Vortex: OpenCL Compatible RISC-V GPGPU.
CoRR, 2020

Heterogeneous 3D Integration for a RISC-V System With STT-MRAM.
IEEE Comput. Archit. Lett., 2020

Flow Event Telemetry on Programmable Data Plane.
Proceedings of the SIGCOMM '20: Proceedings of the 2020 Annual conference of the ACM Special Interest Group on Data Communication on the applications, 2020

Full-Chip Electro-Thermal Coupling Extraction and Analysis for Face-to-Face Bonded 3D ICs.
Proceedings of the ISPD 2020: International Symposium on Physical Design, Taipei, Taiwan, March 29, 2020

Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

TP-GNN: A Graph Neural Network Framework for Tier Partitioning in Monolithic 3D ICs.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

The Financial Archives Management System of University Based on Computer Network Technology.
Proceedings of the Cyber Security Intelligence and Analytics, 2020

2019
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology.
IEEE Micro, 2019

2013
Study on Steering by Wire Controller Based on Improved H∞ Algorithm.
Int. J. Online Eng., 2013


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