Hossein Shamsi

Microelectron. J., 2022

2020

A sub-1V dual-path noise and distortion canceling CMOS LNA for low power wireless applications.

[BibT_eX]

[DOI]

Babak Mazhab Jafari

Microelectron. J., 2020

2019

Digital Noise Coupled MASH Delta-Sigma Modulator.

[BibT_eX]

[DOI]

Ali Rezapour

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Analog programmable neuron and case study on VLSI implementation of Multi-Layer Perceptron (MLP).

[BibT_eX]

[DOI]

Mahsa Heidari

Microelectron. J., 2019

84 dB DC-gain two-stage class-AB OTA.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2019

98-dB Gain Class-AB OTA With 100 pF Load Capacitor in 180-nm Digital CMOS Process.

[BibT_eX]

[DOI]

IEEE Access, 2019

2018

Three-Dimensional Pipeline ADC Utilizing TSV/ Design Optimization and Memristor Ratioed Logic.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2018

Placement and routing method for analogue layout generation using modified cuckoo optimisation algorithm.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2018

Low Power High Speed Dynamic Comparator.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

Automatic Design and Yield Enhancement of Data Converters.

[BibT_eX]

[DOI]

Nahid Mirzaie

Gyung-Su Byun

J. Circuits Syst. Comput., 2017

On the Design of a User Interface for an RFID-Based Vehicle Tracking System.

[BibT_eX]

[DOI]

Fatemeh Nafar

Int. J. Wirel. Inf. Networks, 2017

Yield-aware sizing of pipeline ADC using a multiple-objective evolutionary algorithm.

[BibT_eX]

[DOI]

Nahid Mirzaie

Gyung-Su Byun

Int. J. Circuit Theory Appl., 2017

Positive feedback technique and split-length transistors for DC-gain enhancement of two-stage op-amps.

[BibT_eX]

[DOI]

Mitra Mirhassani

IET Circuits Devices Syst., 2017

2016

Digital Calibration of DAC Unit Elements Mismatch in Pipelined ADCs.

[BibT_eX]

[DOI]

Hamidreza Mafi

Mohammad Yavari

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Fully differential charge-pump comparator-based pipelined ADC in 90 nm CMOS.

[BibT_eX]

[DOI]

Mahdi Hosseinnejad

Microelectron. J., 2016

2015

A statistics-based digital background calibration technique for pipelined ADCs.

[BibT_eX]

[DOI]

Hamidreza Mafi

Reza Mohammadi

Integr., 2015

2013

A Low-Collision CSMA-Based Active RFID for Tracking Applications.

[BibT_eX]

[DOI]

Dawood Moeinfar

Wirel. Pers. Commun., 2013

2012

Positive feedback technique for DC-gain enhancement of folded cascode Op-Amps.

[BibT_eX]

[DOI]

Sina Farahmand

Proceedings of the 10th IEEE International NEWCAS Conference, 2012

On the design of a 2-2-0 MASH delta-sigma-pipeline modulator.

[BibT_eX]

[DOI]

Reza Mohammadi

Mazyar Abedinkhan

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

A 10-bit 50-MS/s charge injection pipelined ADC using a digital calibration.

[BibT_eX]

[DOI]

Proceedings of the International Multi-Conference on Systems, Signals & Devices, 2012

2011

Design of a CMOS LNA for the upper band of UWB receivers.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Design and simulation of a switched capacitor ladder filter in a 90nm CMOS technology for WiMAX applications.

[BibT_eX]

[DOI]

Mohamad Reza Nazemi

Saeed Mehregan

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010

A High PSRR Bandgap Voltage Reference with Virtually Diode-Connected MOS Transistors.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2010

A New Method for Low SNR Estimation of Noisy Speech Signals Using Fourth-Order Moments.

[BibT_eX]

[DOI]

Abolghasem Sayadiyan

IEICE Trans. Inf. Syst., 2010

Design of a robust NTF for continuous-time ΔΣ modulators.

[BibT_eX]

[DOI]

Mahdi Mirzaei

IEICE Electron. Express, 2010

A 109dB PSRR, 31µW fully-MOSFET bandgap voltage reference in 0.13µm CMOS technology.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Conference on Electronics, 2010

A new two-stage Op-Amp using gate-driven, and positive feedback techniques.

[BibT_eX]

[DOI]

Hossein Mirzaie

Hassan Khameh

Proceedings of the 17th IEEE International Conference on Electronics, 2010

A new method for enhancement of the noisy speech with low SNR.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

Jitter-Induced Noise Spectrum at the Output of Continuous-Time DeltaSigma Modulators with NRZ Feedback Waveform.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2009

A new perceptually weighted distance measure for vector quantization of the STFT amplitudes in the speech application.

[BibT_eX]

[DOI]

Abolghasem Sayadiyan

IEICE Electron. Express, 2009

On the Design of a Less Jitter Sensitive NTF for NRZ Multi-bit Continuous-time DeltaSigma Modulators.

[BibT_eX]

[DOI]

Mohammad Yavari

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Less jitter sensitive NTF design for NRZ multi-bit continuous-time Delta-Sigma modulators.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2008

Digital-tuning of RC time constant in Multi-Bit continuous-time Delta-Sigma modulators.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2008

2007

A New Method for the Design of k-Class Bayes Classifiers.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006

Analysis of the Clock Jitter Effects in a Time Invariant Model of Continuous Time Delta Sigma Modulators.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

A New Infrastructure for Digital Pre-Filtering in Multi-bit Continuous Time Delta Sigma Modulators.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2006

A novel structure for the design of 2-1-1 cascaded continuous time delta sigma modulators.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A New Approach for DAC Non-linearity Compensation in Continuous Time Delta Sigma Modulators.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Continuous Time Delta-Sigma Modulators with Arbitrary DAC Waveforms.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

A New Method for Elimination of the Clock Jitter Effects in Continuous Time Delta-Sigma Modulators.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

A Simplified Illustration of Arbitrary DAC Waveform Effects in Continuous Time Delta-Sigma Modulators.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

A new technique for design CMOS LNA for multi-standard receivers.

[BibT_eX]

[DOI]

Parviz Jabedar Maralani

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Power spectral density estimation of the clock jitter in a continuous time Delta Sigma modulator with non return to-zero DAC waveform.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on Electronics, 2005

2004

Return to-zero feedback insertion in a continuous time Delta-Sigma modulator for excess loop delay compensation.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2004

2002

A 160-MS/s six-order wideband bandpass sigma-delta modulator.

[BibT_eX]

[DOI]