Howard David

According to our database1, Howard David authored at least 9 papers between 2007 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
DUO: Exposing On-Chip Redundancy to Rank-Level ECC for High Reliability.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2013
Runnemede: An architecture for Ubiquitous High-Performance Computing.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

2012
An integrated approach to system-level CPU and memory energy efficiency on computing systems.
Proceedings of the International Conference on Energy Aware Computing, 2012

2011
Memory power management via dynamic voltage/frequency scaling.
Proceedings of the 8th International Conference on Autonomic Computing, 2011

2010
RAPL: memory power estimation and capping.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

2008
Software thermal management of dram memory for multicore systems.
Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2008

Mini-rank: Adaptive DRAM architecture for improving memory power efficiency.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

2007
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007

Thermal modeling and management of DRAM memory systems.
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007


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