Hsiao-Pin Su

According to our database, Hsiao-Pin Su authored at least 5 papers between 1997 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1999

A timing-driven soft-macro placement and resynthesis method in interaction with chip floorplanning.

Hsiao-Pin Su, Allen C.-H. Wu, Youn-Long Lin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

A Timing-Driven Soft-Macro Resynthesis Method in Interaction with Chip Floorplanning.

Hsiao-Pin Su, Allen C.-H. Wu, Youn-Long Lin

Proceedings of the 36th Conference on Design Automation, 1999

1998

Performance-driven soft-macro clustering and placement by preserving HDL design hierarchy.

Hsiao-Pin Su, Allen C.-H. Wu, Youn-Long Lin

Proceedings of the 1998 International Symposium on Physical Design, 1998

Integrating logic retiming and register placement.

Tzu-Chieh Tien, Hsiao-Pin Su, Yu-Wen Tsay, Yih-Chih Chou, Youn-Long Lin

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

1997

A phase assignment method for virtual-wire-based hardware emulation.

Hsiao-Pin Su, Youn-Long Lin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997