Hsin-Fu Luo

According to our database1, Hsin-Fu Luo authored at least 6 papers between 2004 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2015
Efficient Memory-Addressing Algorithms for FFT Processor Design.
IEEE Trans. Very Large Scale Integr. Syst., 2015

A radix-2/3/2<sup>2</sup>/2<sup>3</sup> MDC architecture for variable-length FFT processors.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

Efficient memory management scheme for pipelined shared-memory FFT processors.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

2010
Efficient memory management for FFT processors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2006
A cost-effective reconfigurable accelerator for platform-based SOC design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2004
A high-performance area-aware DSP processor architecture for video codecs.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004


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